LAN8720AI-CP SMSC, LAN8720AI-CP Datasheet - Page 71

TXRX ETHERNET 10/100 RMII 24QFN

LAN8720AI-CP

Manufacturer Part Number
LAN8720AI-CP
Description
TXRX ETHERNET 10/100 RMII 24QFN
Manufacturer
SMSC
Type
Transceiverr
Datasheets

Specifications of LAN8720AI-CP

Number Of Drivers/receivers
4/4
Protocol
RMII
Voltage - Supply
1.6 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
24-QFN
Product
Ethernet Transceivers
Standard Supported
802.3, 802.3u
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.6 V
Maximum Operating Temperature
+ 85 C
Ethernet Connection Type
10/100 Base-T
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
638-1084

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LAN8720AI-CP
Manufacturer:
Standard
Quantity:
5 016
Part Number:
LAN8720AI-CP
Manufacturer:
VISHAY
Quantity:
14 585
Part Number:
LAN8720AI-CP
Manufacturer:
SMSC
Quantity:
1 000
Part Number:
LAN8720AI-CP
Manufacturer:
SMSC
Quantity:
20 000
Part Number:
LAN8720AI-CP-ABC
0
Part Number:
LAN8720AI-CP-TR
Manufacturer:
CHIPLUS
Quantity:
3 100
Part Number:
LAN8720AI-CP-TR
0
Company:
Part Number:
LAN8720AI-CP-TR
Quantity:
7 070
Part Number:
LAN8720AI-CP-TR-ABC
0
Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
Datasheet
SMSC LAN8720A/LAN8720Ai
5.5.4
5.5.4.1
SYMBOL
t
t
t
t
t
ohold
t
ihold
clkp
clkh
oval
t
clkl
REFCLKO
su
RXD[1:0],
CRS_DV
TXD[1:0]
RXER
RMII Interface Timing
RMII Timing (REF_CLK Out Mode)
The 50MHz REF_CLK OUT timing applies to the case when nINTSEL is pulled-low. In this mode, a
25MHz crystal or clock oscillator must be input on the XTAL1/CLKIN and XTAL2 pins. For more
information on REF_CLK Out Mode, see
TXEN
Note 5.16 Timing was designed for system load between 10 pf and 25 pf.
REFCLKO period
REFCLKO high time
REFCLKO low time
RXD[1:0], RXER, CRS_DV output valid from
rising edge of REFCLKO
RXD[1:0], RXER, CRS_DV output hold from
rising edge of REFCLKO
TXD[1:0], TXEN setup time to rising edge of
REFCLKO
TXD[1:0], TXEN input hold time after rising edge
of REFCLKO
t
ihold
Table 5.9 RMII Timing Values (REF_CLK Out Mode)
DESCRIPTION
t
Figure 5.4 RMII Timing (REF_CLK Out Mode)
ohold
t
su
t
t
DATASHEET
ihold
oval
t
clkh
t
clkp
Section 3.7.4.2, "REF_CLK Out Mode," on page
71
t
clkl
t
su
t
t
ihold
t
t
oval
clkp
clkp
MIN
1.4
7.0
2.0
20
*0.4
*0.4
t
t
clkp
clkp
MAX
10.0
*0.6
*0.6
t
t
ohold
ihold
t
UNITS
oval
Revision 1.2 (11-10-10)
ns
ns
ns
ns
ns
ns
ns
t
su
Note 5.16
Note 5.16
Note 5.16
Note 5.16
34.
NOTES

Related parts for LAN8720AI-CP