PIC16F1827-I/ML Microchip Technology Inc., PIC16F1827-I/ML Datasheet - Page 222
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC16F1827-I/ML
Manufacturer Part Number
PIC16F1827-I/ML
Description
28 QFN 6x6mm TUBE, 7 KB Flash, 384 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F1826-ISO.pdf
(406 pages)
Specifications of PIC16F1827-I/ML
A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
CAN/I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin QFN
Programmable Memory
7K Bytes
Ram Size
384 Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Standby Current (pic16lf182x)
30 nA @ 1.8 V, Typical
Lead Free Status / Rohs Status
RoHS Compliant part
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PIC16(L)F1826/27
24.4.5
In Half-Bridge applications where all power switches
are modulated at the PWM frequency, the power
switches normally require more time to turn off than to
turn on. If both the upper and lower power switches are
switched at the same time (one turned on, and the
other turned off), both switches may be on for a short
period of time until one switch completely turns off.
During this brief interval, a very high current
(shoot-through current) will flow through both power
switches, shorting the bridge supply. To avoid this
potentially destructive shoot-through current from
flowing during switching, turning on either of the power
switches is normally delayed to allow the other switch
to completely turn off.
In Half-Bridge mode, a digitally programmable
dead-band delay is available to avoid shoot-through
current from destroying the bridge power switches. The
delay occurs at the signal transition from the non-active
state to the active state. See
illustration. The lower seven bits of the associated
PWMxCON register
period in terms of microcontroller instruction cycles
(T
FIGURE 24-17:
DS41391D-page 222
CY
Standard Half-Bridge Circuit (“Push-Pull”)
or 4 T
OSC
PROGRAMMABLE DEAD-BAND
DELAY MODE
).
(Register
EXAMPLE OF HALF-BRIDGE APPLICATIONS
24-4) sets the delay
Figure 24-16
PxA
PxB
for
FET
Driver
FET
Driver
FIGURE 24-16:
PxA
PxB
td = Dead-Band Delay
Note 1: At this time, the TMRx register is equal to the
(2)
(2)
V+
V-
(1)
2: Output signals are shown as active-high.
td
Pulse Width
PRx register.
Load
Period
td
EXAMPLE OF
HALF-BRIDGE PWM
OUTPUT
2011 Microchip Technology Inc.
+
V
-
+
V
-
(1)
Period
(1)
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