PIC16F1827-I/ML Microchip Technology Inc., PIC16F1827-I/ML Datasheet - Page 46
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC16F1827-I/ML
Manufacturer Part Number
PIC16F1827-I/ML
Description
28 QFN 6x6mm TUBE, 7 KB Flash, 384 bytes RAM, 32 MHz Int. Osc, 16 I/0, Enhanced
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F1826-ISO.pdf
(406 pages)
Specifications of PIC16F1827-I/ML
A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
16
Interface
CAN/I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin QFN
Programmable Memory
7K Bytes
Ram Size
384 Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Standby Current (pic16lf182x)
30 nA @ 1.8 V, Typical
Lead Free Status / Rohs Status
RoHS Compliant part
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- Download datasheet (4Mb)
PIC16(L)F1826/27
REGISTER 4-2:
DS41391D-page 46
bit 7
Legend:
R = Readable bit
‘0’ = Bit is cleared
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7-5
bit 4
bit 3-2
bit 1-0
Note 1:
U-1
—
2:
The LVP bit cannot be programmed to ‘0’ when Programming mode is entered via LVP.
The DEBUG bit in Configuration Word is managed automatically by device development tools
including debuggers and programmers. For normal device operation, this bit should be
maintained as a '1'.
LVP: Low-Voltage Programming Enable bit
1 = Low-voltage programming enabled
0 = High-voltage on MCLR must be used for programming
DEBUG: In-Circuit Debugger Mode bit
1 = In-Circuit Debugger disabled, ICSPCLK and ICSPDAT are general purpose I/O pins
0 = In-Circuit Debugger enabled, ICSPCLK and ICSPDAT are dedicated to the debugger
Unimplemented: Read as ‘1’
BORV: Brown-out Reset Voltage Selection bit
1 = Brown-out Reset voltage set to 1.9V (typical)
0 = Brown-out Reset voltage set to 2.5V (typical)
STVREN: Stack Overflow/Underflow Reset Enable bit
1 = Stack Overflow or Underflow will cause a Reset
0 = Stack Overflow or Underflow will not cause a Reset
PLLEN: PLL Enable bit
1 = 4xPLL enabled
0 = 4xPLL disabled
Unimplemented: Read as ‘1’
Reserved: This location should be programmed to a ‘1’.
Unimplemented: Read as ‘1’
WRT<1:0>: Flash Memory Self-Write Protection bits
2 kW Flash memory (PIC16(L)F1826 only):
4 kW Flash memory (PIC16(L)F1827 only):
11 = Write protection off
10 = 000h to 1FFh write-protected, 200h to 7FFh may be modified by EECON control
01 = 000h to 3FFh write-protected, 400h to 7FFh may be modified by EECON control
00 = 000h to 7FFh write-protected, no addresses may be modified by EECON control
11 = Write protection off
10 = 000h to 1FFh write-protected, 200h to FFFh may be modified by EECON control
01 = 000h to 7FFh write-protected, 800h to FFFh may be modified by EECON control
00 = 000h to FFFh write-protected, no addresses may be modified by EECON control
U-1
—
CONFIGURATION WORD 2
bit 13
P = Programmable bit
‘1’ = Bit is set
LVP
R/P-1
U-1
—
(1)
DEBUG
Reserved
R/P-1/1
R/P-1
(2)
U = Unimplemented bit, read as ‘1’
-n = Value when blank or after Bulk Erase
U-1
U-1
—
—
BORV
R/P-1
U-1
—
2011 Microchip Technology Inc.
STVREN
R/P-1
R/P-1
WRT<1:0>
R/P-1/1
PLLEN
R/P-1
bit 8
bit 0
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