PIC24FJ128DA110-I/PT Microchip Technology Inc., PIC24FJ128DA110-I/PT Datasheet - Page 279
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC24FJ128DA110-I/PT
Manufacturer Part Number
PIC24FJ128DA110-I/PT
Description
100 TQFP 12x12x1mm TRAY, 16-bit, 128KB Flash, 24K RAM, USB, Graphics
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC24FJ128DA110-IPT.pdf
(408 pages)
Specifications of PIC24FJ128DA110-I/PT
A/d Inputs
24 Channel, 10-bit
Comparators
3
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
84
Interface
I2C/SPI/UART/USART/USB
Memory Type
Flash
Number Of Bits
16
Package Type
100-pin TQFP
Programmable Memory
128K Bytes
Ram Size
24K Bytes
Speed
32 MHz
Temperature Range
–40 to 85 °C
Timers
5-16-bit
Voltage, Range
2.2-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ128DA110-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 279 of 408
- Download datasheet (4Mb)
REGISTER 19-5:
2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6-5
bit 4-0
CSDIS
R/W-0
R/W-0
ACKP
CSDIS: Chip Select x Disable bit
1 = Disable the Chip Select x functionality
0 = Enable the Chip Select x functionality
CSP: Chip Select x Polarity bit
1 = Active-high (PMCSx)
0 = Active-low (PMCSx)
CSPTEN: PMCSx Port Enable bit
1 = PMCSx port is enabled
0 = PMCSx port is disabled
BEP: Chip Select x Nibble/Byte Enable Polarity bit
1 = Nibble/Byte enable active-high (PMBE0, PMBE1)
0 = Nibble/Byte enable active-low (PMBE0, PMBE1)
Unimplemented: Read as ‘0’
WRSP: Chip Select x Write Strobe Polarity bit
For Slave modes and Master mode when SM = 0:
1 = Write strobe active-high (PMWR)
0 = Write strobe active-low (PMWR)
For Master mode when SM = 1:
1 = Enable strobe active-high (PMENB)
0 = Enable strobe active-low (PMENB)
RDSP: Chip Select x Read Strobe Polarity bit
For Slave modes and Master mode when SM = 0:
1 = Read strobe active-high (PMRD)
0 = Read strobe active-low (PMRD)
For Master mode when SM = 1:
1 = Read/write strobe active-high (PMRD/PMWR)
0 = Read/Write strobe active-low (PMRD/PMWR)
SM: Chip Select x Strobe Mode bit
1 = Read/Write and enable strobes (PMRD/PMWR and PMENB)
0 = Read and write strobes (PMRD and PMWR)
ACKP: Chip Select x Acknowledge Polarity bit
1 = ACK active-high (PMACK1)
0 = ACK active-low (PMACK1)
PTSZ<1:0>: Chip Select x Port Size bits
11 = Reserved
10 = 16-bit port size (PMD<15:0>)
01 = 4-bit port size (PMD<3:0>)
00 = 8-bit port size (PMD<7:0>)
Unimplemented: Read as ‘0’
PTSZ1
R/W-0
R/W-0
CSP
PMCSxCF: CHIP SELECT x CONFIGURATION REGISTER
W = Writable bit
‘1’ = Bit is set
CSPTEN
PTSZ0
R/W-0
R/W-0
PIC24FJ256DA210 FAMILY
R/W-0
BEP
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
WRSP
R/W-0
U-0
—
x = Bit is unknown
R/W-0
RDSP
U-0
—
DS39969B-page 279
R/W-0
U-0
SM
—
bit 8
bit 0
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