PIC24FJ128DA110-I/PT Microchip Technology Inc., PIC24FJ128DA110-I/PT Datasheet - Page 327
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PIC24FJ128DA110-I/PT
Manufacturer Part Number
PIC24FJ128DA110-I/PT
Description
100 TQFP 12x12x1mm TRAY, 16-bit, 128KB Flash, 24K RAM, USB, Graphics
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC24FJ128DA110-IPT.pdf
(408 pages)
Specifications of PIC24FJ128DA110-I/PT
A/d Inputs
24 Channel, 10-bit
Comparators
3
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
84
Interface
I2C/SPI/UART/USART/USB
Memory Type
Flash
Number Of Bits
16
Package Type
100-pin TQFP
Programmable Memory
128K Bytes
Ram Size
24K Bytes
Speed
32 MHz
Temperature Range
–40 to 85 °C
Timers
5-16-bit
Voltage, Range
2.2-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ128DA110-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 327 of 408
- Download datasheet (4Mb)
REGISTER 23-1:
2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-10
bit 9-8
bit 7-5
bit 4-3
bit 2
bit 1
bit 0
Note 1:
ADON
SSRC2
R/W-0
R/W-0
(1)
The values of the ADC1BUFx registers will not retain their values once the ADON bit is cleared. Read out
the conversion values from the buffer before disabling the module.
ADON: A/D Operating Mode bit
1 = A/D Converter module is operating
0 = A/D Converter is off
Unimplemented: Read as ‘0’
ADSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
Unimplemented: Read as ‘0’
FORM<1:0>: Data Output Format bits
11 = Signed fractional (sddd dddd dd00 0000)
10 = Fractional (dddd dddd dd00 0000)
01 = Signed integer (ssss sssd dddd dddd)
00 = Integer (0000 00dd dddd dddd)
SSRC<2:0>: Conversion Trigger Source Select bits
111 = Internal counter ends sampling and starts conversion (auto-convert)
110 = CTMU event ends sampling and starts conversion
101 = Reserved
100 = Timer5 compare ends sampling and starts conversion
011 = Reserved
010 = Timer3 compare ends sampling and starts conversion
001 = Active transition on INT0 pin ends sampling and starts conversion
000 = Clearing SAMP bit ends sampling and starts conversion
Unimplemented: Read as ‘0’
ASAM: A/D Sample Auto-Start bit
1 = Sampling begins immediately after the last conversion completes. The SAMP bit is auto-set.
0 = Sampling begins when the SAMP bit is set
SAMP: A/D Sample Enable bit
1 = A/D sample/hold amplifier is sampling input
0 = A/D sample/hold amplifier is holding
DONE: A/D Conversion Status bit
1 = A/D conversion is done
0 = A/D conversion is NOT done
SSRC1
R/W-0
U-0
—
AD1CON1: A/D CONTROL REGISTER 1
HSC = Hardware Settable/Clearable bit
W = Writable bit
‘1’ = Bit is set
ADSIDL
SSRC0
R/W-0
R/W-0
(1)
PIC24FJ256DA210 FAMILY
U-0
U-0
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
R/W-0
ASAM
U-0
—
x = Bit is unknown
R-0, HSC
FORM1
SAMP
R/W-0
DS39969B-page 327
R-0, HSC
FORM0
R/W-0
DONE
bit 8
bit 0
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