PIC24FJ128DA110-I/PT Microchip Technology Inc., PIC24FJ128DA110-I/PT Datasheet - Page 348
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PIC24FJ128DA110-I/PT
Manufacturer Part Number
PIC24FJ128DA110-I/PT
Description
100 TQFP 12x12x1mm TRAY, 16-bit, 128KB Flash, 24K RAM, USB, Graphics
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC24FJ128DA110-IPT.pdf
(408 pages)
Specifications of PIC24FJ128DA110-I/PT
A/d Inputs
24 Channel, 10-bit
Comparators
3
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
84
Interface
I2C/SPI/UART/USART/USB
Memory Type
Flash
Number Of Bits
16
Package Type
100-pin TQFP
Programmable Memory
128K Bytes
Ram Size
24K Bytes
Speed
32 MHz
Temperature Range
–40 to 85 °C
Timers
5-16-bit
Voltage, Range
2.2-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ128DA110-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 348 of 408
- Download datasheet (4Mb)
PIC24FJ256DA210 FAMILY
REGISTER 27-1:
DS39969B-page 348
bit 23
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 23-16
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9-8
bit 7
bit 6
bit 5
Note 1:
FWDTEN
reserved
R/PO-1
U-0
r-x
—
Unimplemented in 64-pin devices, maintain at ‘1’ (V
Unimplemented: Read as ‘1’
Reserved: The value is unknown; program as ‘0’
JTAGEN: JTAG Port Enable bit
1 = JTAG port is enabled
0 = JTAG port is disabled
GCP: General Segment Program Memory Code Protection bit
1 = Code protection is disabled
0 = Code protection is enabled for the entire program memory space
GWRP: General Segment Code Flash Write Protection bit
1 = Writes to program memory are allowed
0 = Writes to program memory are not allowed
DEBUG: Background Debugger Enable bit
1 = Device resets into Operational mode
0 = Device resets into Debug mode
Reserved: Always maintain as ‘1’
ICS<1:0>: Emulator Pin Placement Select bits
11 = Emulator functions are shared with PGEC1/PGED1
10 = Emulator functions are shared with PGEC2/PGED2
01 = Emulator functions are shared with PGEC3/PGED3
00 = Reserved; do not use
FWDTEN: Watchdog Timer Enable bit
1 = Watchdog Timer is enabled
0 = Watchdog Timer is disabled
WINDIS: Windowed Watchdog Timer Disable bit
1 = Standard Watchdog Timer is enabled
0 = Windowed Watchdog Timer is enabled; FWDTEN must be ‘1’
ALTVREF: Alternate V
1 = V
0 = V
JTAGEN
WINDIS
R/PO-1
R/PO-1
U-0
—
REF
REF
CW1: FLASH CONFIGURATION WORD 1
is on a default pin (V
is on an alternate pin (V
r = Reserved bit
W = Writable bit
‘1’ = Bit is set
ALTVREF
R/PO-1
R/PO-1
GCP
U-0
—
REF
(1)
Pin Selection bit
REF
R/PO-1
R/PO-1
FWPSA
GWRP
REF
U-0
+ on RA10 and V
—
+ on RB0 and V
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
WDTPS3
DEBUG
R/PO-1
R/PO-1
REF
U-0
—
+ on RB0 and V
REF
REF
- on RA9)
- on RB1)
reserved
WDTPS2
R/PO-1
U-0
r-1
—
REF
- on RB1).
2010 Microchip Technology Inc.
x = Bit is unknown
WDTPS1
R/PO-1
R/PO-1
ICS1
U-0
—
WDTPS0
R/PO-1
R/PO-1
ICS0
U-0
—
bit 16
bit 8
bit 0
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