PIC24FJ128DA110-I/PT Microchip Technology Inc., PIC24FJ128DA110-I/PT Datasheet - Page 314
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC24FJ128DA110-I/PT
Manufacturer Part Number
PIC24FJ128DA110-I/PT
Description
100 TQFP 12x12x1mm TRAY, 16-bit, 128KB Flash, 24K RAM, USB, Graphics
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC24FJ128DA110-IPT.pdf
(408 pages)
Specifications of PIC24FJ128DA110-I/PT
A/d Inputs
24 Channel, 10-bit
Comparators
3
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
84
Interface
I2C/SPI/UART/USART/USB
Memory Type
Flash
Number Of Bits
16
Package Type
100-pin TQFP
Programmable Memory
128K Bytes
Ram Size
24K Bytes
Speed
32 MHz
Temperature Range
–40 to 85 °C
Timers
5-16-bit
Voltage, Range
2.2-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ128DA110-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 314 of 408
- Download datasheet (4Mb)
PIC24FJ256DA210 FAMILY
REGISTER 22-12: G1W2ADRH: GPU WORK AREA 2 START ADDRESS REGISTER HIGH
REGISTER 22-13: G1PUW: GPU WORK AREA WIDTH REGISTER
REGISTER 22-14: G1PUH: GPU WORK AREA HEIGHT REGISTER
DS39969B-page 314
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-11
bit 10-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-11
bit 10-0
W2ADR23
R/W-0
PUW7
R/W-0
PUH7
R/W-0
U-0
U-0
U-0
—
—
—
Unimplemented: Read as ‘0’
PUH<10:0>: GPU Work Area Height bits (in pixels)
Unimplemented: Read as ‘0’
PUW<10:0>: GPU Work Area Width bits (in pixels)
Unimplemented: Read as ‘0’
W2ADR<23:16>: GPU Work Area 2 Start Address High bits
Work area address must point to an even byte address in memory.
W2ADR22
R/W-0
R/W-0
PUW6
PUH6
R/W-0
U-0
U-0
—
U-0
—
—
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W2ADR21
R/W-0
PUH5
R/W-0
PUW5
U-0
R/W-0
U-0
—
—
U-0
—
R/W-0
PUH4
W2ADR20
PUW4
R/W-0
U-0
U-0
—
R/W-0
—
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
PUH3
R/W-0
PUW3
W2ADR19
U-0
U-0
—
—
R/W-0
U-0
—
PUH10
PUW10
R/W-0
R/W-0
PUH2
W2ADR18
R/W-0
R/W-0
PUW2
R/W-0
U-0
—
2010 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
W2ADR17
R/W-0
R/W-0
PUH9
PUH1
R/W-0
PUW9
R/W-0
PUW1
R/W-0
U-0
—
W2ADR16
R/W-0
R/W-0
PUH8
PUH0
PUW8
PUW0
R/W-0
R/W-0
R/W-0
U-0
—
bit 8
bit 0
bit 8
bit 0
bit 8
bit 0
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