PS10NG Supertex, PS10NG Datasheet

Supervisory Circuits Quad Pwr Seq Cntlr

PS10NG

Manufacturer Part Number
PS10NG
Description
Supervisory Circuits Quad Pwr Seq Cntlr
Manufacturer
Supertex
Datasheet

Specifications of PS10NG

Number Of Voltages Monitored
4
Manual Reset
Not Resettable
Watchdog
No Watchdog
Supply Voltage (max)
- 10 V
Supply Voltage (min)
- 90 V
Supply Current (typ)
450 uA
Maximum Power Dissipation
750 mW
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SO-14
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Features
Applications
Typical Application Circuit
Sequencing of four supplies, ICs, or subsystems
Independently programmable delays between open
drain PWRGD fl ags (5ms to 200ms)
±10V to ±90V operation
Tracking in combination with Schottky diodes
Input supervisors including:
Low power consumption, 0.4mA supply current
Available in a space saving 14-Lead SOIC package
Power supply sequencing
-48V telecom and networking distributed systems
-24V cellular and fi xed wireless systems
-24V PBX systems
+48V storage systems
FPGA, microprocessor tracking
Industrial/embedded system timing/sequencing
High voltage MEMs driver’s supply sequencing
High voltage display driver’s supply sequencing
-48V or GND
GND or +48V
UV/OV lock out/enable
Power-on-Reset (POR)
Quad Power Sequencing Controller
9.76KΩ
487KΩ
6.81KΩ
Notes:
1. Under Voltage Shutdown (UV) set to 37V.
2. Over Voltage Shutdown (OV) to 57.8V.
6
5
7
OV
VEE
UV
RTB
TB
VIN
11
14
RTC
PS10
TC
12
RTD
TD
13
General Description
Many of today’s high performance FPGA’s, microprocessors,
DSP and industrial/embedded subsystems require sequencing
of the input power. Historically this has been accomplished
by: i) discretely using comparators, references & RC circuits;
ii) using expensive programmable controllers; or iii) with low
voltage sequencers requiring resistor drop downs and several
high voltage optocoupler or level shift components.
The PS10 saves board space, improves accuracy, eliminates
optocouplers or level shifts and reduces overall component
count by combining four timers, programmable input UV/
OV supervisors, a programmable POR, and four 90V open
drain outputs. A high reliability, high voltage, junction isolated
process allows the PS10 to be connected directly across the
high voltage input rails.
The power-on-reset interval (POR) may be programmed by a
capacitor on Cramp. To sequence additional systems, multiple
PS10s may be daisy-chained together. If at any time the input
supply falls outside the UV/OV detector range, the PWRGD
outputs will immediately become IN-ACTIVE.
The PS10 is available in a space saving 14-Lead SOIC
package.
RAMP
10
10nF
PWRGD-D
PWRGD-C
PWRGD-A
PWRGD-B
2
3
4
1
DC/DC
CONVERTER
DC/DC
CONVERTER
DC/DC
CONVERTER
DC/DC
CONVERTER
/EN
/EN
/EN
/EN
+12V
COM
+5V
COM
COM
COM
+3.3V
+2.5V
PS10

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