PEB3081FV14XT Lantiq, PEB3081FV14XT Datasheet - Page 132
PEB3081FV14XT
Manufacturer Part Number
PEB3081FV14XT
Description
Manufacturer
Lantiq
Datasheet
1.PEB3081FV14XT.pdf
(198 pages)
Specifications of PEB3081FV14XT
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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Preliminary
4.1
4.1.1
Value after reset: 00
TR_
MODE2
DIM2-0 ... Digital Interface Modes
These bits define the characteristics of the IOM Data Ports (DU, DD). The DIM0 bit
enables/disables the collission detection. The DIM1 bit enables/disables the TIC bus
access. The effect of the individual DIM bits is summarized in the table below.
Example: ’010’ selects transparent D-channel, collision detection disabled and TIC bus
disabled.
Data Sheet
DIM2 DIM1 DIM0 Characteristics
0
0
0
0
1
0
1
x
7
Transceiver and C/I Registers
TR_MODE2 - Transceiver Mode Register 2
0
0
1
x
H
Transparent D-channel, the collission detection is disabled
Stop/go bit evaluated for D-channel access handling
Last octet of IOM channel 2 used for TIC bus access
TIC bus access is disabled
Reserved
0
0
0
132
0
DIM2
Detailed Register Description
DIM1
0
DIM0
RD/WR (22)
PEB 3081
PEF 3081
2000-09-27
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