PEB3081FV14XT Lantiq, PEB3081FV14XT Datasheet - Page 41
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PEB3081FV14XT
Manufacturer Part Number
PEB3081FV14XT
Description
Manufacturer
Lantiq
Datasheet
1.PEB3081FV14XT.pdf
(198 pages)
Specifications of PEB3081FV14XT
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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Preliminary
Figure 16
Note: The ITU I.430 standard specifies S1 - S5 for optional use.
Data Sheet
– F
– L.
– D
– E
– F
– N
– B1
– B2
– A
– S
– M
A
Framing Bit
D.C. Balancing Bit
D-Channel Data Bit
D-Channel Echo Bit
Auxiliary Framing Bit
B1-Channel Data Bit
B2-Channel Data Bit
Activation Bit
S-Channel Data Bit
Multiframing Bit
Frame Structure at Reference Points S and T (ITU I.430)
F = (0b)
positive pulse, always code violation)
L. = (0b)
after the last L. bit was odd
Signaling data specified by user
E = D
D-bit
See section 6.3 in ITU I.430
N =
User data
User data
A = (0b)
A = (1b)
S
M = (1b)
41
1
channel data (see note below)
F
A
received E-bit is equal to transmitted
Description of Functional Blocks
identifies new frame (always
INFO 2 transmitted
INFO 4 transmitted
number of binary ZEROs sent
Start of new multiframe
PEB 3081
PEF 3081
2000-09-27
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