PEF24911HV22XP Lantiq, PEF24911HV22XP Datasheet - Page 24
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PEF24911HV22XP
Manufacturer Part Number
PEF24911HV22XP
Description
Manufacturer
Lantiq
Datasheet
1.PEF24911HV22XP.pdf
(155 pages)
Specifications of PEF24911HV22XP
Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Table 1
Pin No.
58
59
56
62
Interface to the Analog Front End
4
11
Data Sheet
Pin Definitions and Functions (cont’d)
Symbol
PBX
AUTO
SSP
DT
CL15
PDM0
Input (I)
Output (O)
I
I
I
I
I
I
Function
reserved, clamp to low
EOC Auto Mode
selects auto or transparent mode for EOC
channel processing,
the setting has effect on all ports
’1’= EOC auto mode
(MFILT= xxxx x100)
’0’= EOC transparent mode
(MFILT= xxxx x001)
Send Single Pulses (SSP) Test Mode
’1’= alternating +/-3 pulses are issued at all
line ports in 1.5 ms intervals
’0’= deactivated, clamp to GND if not used
This pin function corresponds to the SW
selection by C/I= SSP besides the fact that the
HW selection impacts all line ports while the
SW selection impacts only the chosen line
Data Through (DT) Test Mode
enables/disables DT test mode
’1’= DT test mode enabled,
the U-transceiver is forced on all line ports to
enter the ’Transparent’ state
’0’= DT test mode disabled
This pin function corresponds to the SW
selection by C/I= DT besides the fact that the
HW selection impacts all line ports while the
SW selection impacts only the chosen line
15.36 MHz Master Clock Input
Pulse Density Modulated Receive Data of Line
Port 0
pulse density modulated bit stream from the
PEF 24902 Quad AFE that is output from the
second-order sigma-delta ADC
14
Pin Descriptions
PEF 24911
2001-07-16
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