PEF24911HV22XP Lantiq, PEF24911HV22XP Datasheet - Page 36
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PEF24911HV22XP
Manufacturer Part Number
PEF24911HV22XP
Description
Manufacturer
Lantiq
Datasheet
1.PEF24911HV22XP.pdf
(155 pages)
Specifications of PEF24911HV22XP
Control Interface
HDLC
Lead Free Status / Rohs Status
Supplier Unconfirmed
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PEF 24911
Functional Description
The monitor channel is full duplex and operates on a pseudo-asynchronous base, i.e.
while data transfer on the bus takes place synchronized to frame synchronization, the
flow of monitor data is controlled by the MR- and MX-bits. Monitor data will be transmitted
repeatedly until its reception is acknowledged.
Figure 12
illustrates a monitor transfer at maximum speed. The transmission of a 2-byte
®
monitor command followed by a 2-byte response requires a minimum of 15 IOM
-2
frames (reception 7 frames + transmission 8 frames = 1.875 ms). In case the controller
is able to confirm the receipt of first response byte in the frame immediately following the
MX-transition on DOUT from high to low (i.e. in frame No. 9), 1 byte may be saved (7
frames + 7 frames).
Transmission and reception of monitor messages can be performed simultaneously by
the U-transceiver. In the procedure depicted in
Figure 12
it would be possible for the U-
transceiver to transmit monitor data in frames 1–5 (excluding EOM-indication) and
receive monitor data from frame 8 onwards.
M 1/2:Monitor message 1. and 2. byte
R 1/2:Monitor response 1. and 2. byte
Figure 12
Handshake Protocol with a 2-Byte Monitor Message/Response
Idle State
After the bits MR and MX have been held inactive (i.e. high) for two or more successive
®
IOM
-frames, the channel is considered idle in this direction.
Data Sheet
26
2001-07-16
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