PEF24911HV22XP Lantiq, PEF24911HV22XP Datasheet - Page 27

• Manufacturer Part Number: PEF24911HV22XP
• Manufacturer: Lantiq

Specifications of PEF24911HV22XP

• Control Interface: HDLC
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Table 1
Pin No.
26,
24
23,
21
19,
18
Test Pins
29
20
52
Data Sheet
Pin Definitions and Functions (cont’d)
Symbol
ST10
ST11
ST20
ST21
ST30
ST31
CLS0
CLS1
CLS2
Input (I)
Output (O)
I
I
I
O
O
O
Function
Status Pin of Line Port 1
change of status is passed to IOM
1/5/9/13 via MON-8 message ’AST’ at bit
positions S
Connect to either VDD or VSS if not used.
Status Pin of Line Port 2
change of status is passed to IOM
2/6/10/14 via MON-8 message ’AST’ at bit
positions S
Connect to either VDD or VSS if not used.
Status Pin of Line Port3
change of status is passed to IOM
3/7/11/15 via MON-8 message ’AST’ at bit
positions S
Connect to either VDD or VSS if not used.
12 msec clock synchronized to the received
Superframe of Port 0
can be used for monitoring and test purposes
Note: The delay between both signals may
12 msec clock synchronized to the received
Superframe of Port 1
can be used for monitoring and test purposes
Note: The delay between both signals may
12 msec clock synchronized to the received
Superframe of Port 2
can be used for monitoring and test purposes
Note: The delay between both signals may
17
vary from activation to activation.
vary from activation to activation.
vary from activation to activation.
0,
0,
0,
S
S
S
1
1
1
.
.
.
Pin Descriptions
®
®
®
PEF 24911
-2 channel
-2 channel
-2 channel
2001-07-16