DSPIC33FJ32MC204-I/PT Microchip Technology Inc., DSPIC33FJ32MC204-I/PT Datasheet - Page 155
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DSPIC33FJ32MC204-I/PT
Manufacturer Part Number
DSPIC33FJ32MC204-I/PT
Description
16-BIT DSC, 44LD, 32KB FLASH, MOTOR, 40 MIPS, NANOWATT
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC33FJ32MC204-IPT.pdf
(292 pages)
Specifications of DSPIC33FJ32MC204-I/PT
A/d Inputs
9-Channels, 10-Bit
Cpu Speed
40 MIPS
Eeprom Memory
0 Bytes
Input Output
35
Interface
I2C, SPI, UART/USART
Ios
35
Memory Type
Flash
Number Of Bits
16
Package Type
44-pin TQFP
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
3-3.6 V
Dc
08+
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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14.7.2
When the Immediate Update Enable bit is set (IUE = 1),
any write to the Duty Cycle registers updates the new
duty cycle value immediately. This feature gives pro-
grammers the option to allow immediate updates of the
active PWM Duty Cycle registers instead of waiting for
the end of the current time base period. Duty cycle
update effects are as follows:
• If the PWM output is active at the time the new
• If the PWM output is active at the time the new
• If the PWM output is inactive at the time the new
System stability is improved in closed-loop servo appli-
cations by reducing the delay between system obser-
vation and the issuance of system corrective
commands when immediate updates are enabled
(IUE = 1).
14.8
In the Complementary mode of operation, each pair of
PWM outputs is obtained by a complementary PWM
signal. A dead time can be inserted during device
switching, when both outputs are inactive for a short
period (refer to Section 14.9 “Dead-Time Genera-
tors”).
In Complementary mode, the duty cycle comparison
units are assigned to the PWM outputs as follows:
• PxDC1 register controls PWM1H/PWM1L outputs
• PxDC2 register controls PWM2H/PWM2L outputs
• PxDC3 register controls PWM3H/PWM3L outputs
FIGURE 14-5:
© 2007 Microchip Technology Inc.
duty cycle is written and the new duty cycle is less
than the current time base value, the PWM pulse
width will be shortened.
duty cycle is written and the new duty cycle is
greater than the current time base value, the
PWM pulse width will be lengthened.
duty cycle is written and the new duty cycle is
greater than the current time base value, the
PWM output will become active immediately and
will remain active for the new written duty cycle
value.
Complementary PWM Operation
Duty Cycle Generator
PWMxH
PWMxL
Time Selected by DTSxA bit (A or B)
DUTY CYCLE IMMEDIATE UPDATES
DEAD-TIME TIMING DIAGRAM
Preliminary
Complementary mode is selected for each PWM
pin pair by clearing the appropriate PMODx bit in the
PWMxCON1 SFR. The PWM I/O pins are set to
Complementary mode by default upon a device Reset.
14.9
Dead-time generation can be provided when any of the
PWM I/O pin pairs are operating in Complementary Out-
put mode. The PWM outputs use push-pull drive circuits.
Power output devices cannot switch instantaneously, so
some amount of time must be provided between the
turn-off event of one PWM output in a complementary
pair and the turn-on event of the other transistor.
The PWM module allows two different dead times to be
programmed. These two dead times can be used in
one of two methods to increase user flexibility:
• The PWM output signals can be optimized for
• The two dead times can be assigned to individual
14.9.1
Each complementary output pair for the PWM module
has a 6-bit down counter that is used to produce the
dead-time insertion. As shown in Figure 14-5, each
dead-time unit has a rising and falling edge detector
connected to the duty cycle comparison output.
different turn-off times in the high side and low
side transistors in a complementary pair of tran-
sistors. The first dead time is inserted between
the turn-off event of the lower transistor of the
complementary pair and the turn-on event of the
upper transistor. The second dead time is inserted
between the turn-off event of the upper transistor
and the turn-on event of the lower transistor.
PWM I/O pin pairs. This operating mode allows
the PWM module to drive different transistor/load
combinations with each complementary PWM I/O
pin pair.
Dead-Time Generators
DEAD-TIME GENERATORS
Time Selected by DTSxI bit (A or B)
DS70283B-page 153
I/O
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