DSPIC33FJ32MC204-I/PT Microchip Technology Inc., DSPIC33FJ32MC204-I/PT Datasheet - Page 213
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
DSPIC33FJ32MC204-I/PT
Manufacturer Part Number
DSPIC33FJ32MC204-I/PT
Description
16-BIT DSC, 44LD, 32KB FLASH, MOTOR, 40 MIPS, NANOWATT
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC33FJ32MC204-IPT.pdf
(292 pages)
Specifications of DSPIC33FJ32MC204-I/PT
A/d Inputs
9-Channels, 10-Bit
Cpu Speed
40 MIPS
Eeprom Memory
0 Bytes
Input Output
35
Interface
I2C, SPI, UART/USART
Ios
35
Memory Type
Flash
Number Of Bits
16
Package Type
44-pin TQFP
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
3-3.6 V
Dc
08+
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ32MC204-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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REGISTER 19-4:
© 2007 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-11
bit 10-9
bit 8
bit 7-3
U-0
U-0
—
—
Unimplemented: Read as ‘0’
CH123NB<1:0>: Channel 1, 2, 3 Negative Input Select for Sample B bits
dsPIC33FJ32MC202 devices only:
If AD12B = 1:
11 = Reserved
10 = Reserved
01 = Reserved
00 = Reserved
If AD12B = 0:
11 = Reserved
10 = Reserved
01 = CH1, CH2, CH3 negative input is V
00 = CH1, CH2, CH3 negative input is V
dsPIC33FJ32MC204 and dsPIC33FJ16MC304 devices only:
If AD12B = 1:
11 = Reserved
10 = Reserved
01 = Reserved
00 = Reserved
If AD12B = 0:
11 = Reserved
10 = CH1 negative input is AN6, CH2 negative input is AN7, CH3 negative input is AN8
01 = CH1, CH2, CH3 negative input is V
00 = CH1, CH2, CH3 negative input is V
CH123SB: Channel 1, 2, 3 Positive Input Select for Sample B bit
If AD12B = 1:
1 = Reserved
0 = Reserved
If AD12B = 0:
1 = CH1 positive input is AN3, CH2 positive input is AN4, CH3 positive input is AN5
0 = CH1 positive input is AN0, CH2 positive input is AN1, CH3 positive input is AN2
Unimplemented: Read as ‘0’
U-0
U-0
—
—
AD1CHS123: ADC1 INPUT CHANNEL 1, 2, 3 SELECT REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
U-0
—
—
Preliminary
U-0
U-0
—
—
REF
REF
REF
REF
-
-
-
-
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
R/W-0
R/W-0
CH123NB<1:0>
CH123NA<1:0>
x = Bit is unknown
R/W-0
R/W-0
DS70283B-page 211
CH123SB
CH123SA
R/W-0
R/W-0
bit 8
bit 0
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