DSPIC33FJ32MC204-I/PT Microchip Technology Inc., DSPIC33FJ32MC204-I/PT Datasheet - Page 79
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DSPIC33FJ32MC204-I/PT
Manufacturer Part Number
DSPIC33FJ32MC204-I/PT
Description
16-BIT DSC, 44LD, 32KB FLASH, MOTOR, 40 MIPS, NANOWATT
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC33FJ32MC204-IPT.pdf
(292 pages)
Specifications of DSPIC33FJ32MC204-I/PT
A/d Inputs
9-Channels, 10-Bit
Cpu Speed
40 MIPS
Eeprom Memory
0 Bytes
Input Output
35
Interface
I2C, SPI, UART/USART
Ios
35
Memory Type
Flash
Number Of Bits
16
Package Type
44-pin TQFP
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
3-3.6 V
Dc
08+
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ32MC204-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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REGISTER 6-9:
© 2007 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
R/W-0
T2IE
U-0
—
Unimplemented: Read as ‘0’
AD1IE: ADC1 Conversion Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
U1TXIE: UART1 Transmitter Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
U1RXIE: UART1 Receiver Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
SPI1IE: SPI1 Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
SPI1EIE: SPI1 Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T3IE: Timer3 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T2IE: Timer2 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
OC2IE: Output Compare Channel 2 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
IC2IE: Input Capture Channel 2 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
T1IE: Timer1 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
OC1IE: Output Compare Channel 1 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
OC2IE
R/W-0
U-0
—
IEC0: INTERRUPT ENABLE CONTROL REGISTER 0
W = Writable bit
‘1’ = Bit is set
R/W-0
AD1IE
R/W-0
IC2IE
U1TXIE
R/W-0
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U1RXIE
R/W-0
R/W-0
T1IE
SPI1IE
OC1IE
R/W-0
R/W-0
x = Bit is unknown
SPI1EIE
R/W-0
R/W-0
IC1IE
DS70283B-page 77
INT0IE
R/W-0
R/W-0
T3IE
bit 8
bit 0
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