MCP795W10-I/SL Microchip Technology, MCP795W10-I/SL Datasheet - Page 35

• Manufacturer Part Number: MCP795W10-I/SL
• Description: SPI GPP RTCC, 1Kb EE, 64B SRAM, WD Timer, Event Detect, ID 14 SOIC .150in TUBE
• Manufacturer: Microchip Technology

9.1.9
The Write Status Register (SRWRITE) instruction
allows the user to select one of four levels of protec-
tion for the array by writing to the appropriate bits in
the STATUS register. The array is divided up into four
segments. The user has the ability to write-protect
none, one, two, or all four of the segments of the array.
The partitioning is controlled as shown in
See
TABLE 9-2:
FIGURE 9-6:
 2011-2012 Microchip Technology Inc.
SCK
SO
CS
BP1
Figure 9-6
SI
0
0
1
1
WRITE STATUS REGISTER
(SRWRITE)
for the SRWRITE timing sequence.
0
0
ARRAY PROTECTION
BP0
0
1
0
1
0
WRITE STATUS REGISTER TIMING SEQUENCE
1
0
2
Instruction
Array Addresses
Write-Protected
(2 kbit shown)
0
3
(C0h-FFh)
(80h-FFh)
(00h-FFh)
upper 1/4
upper 1/2
none
0
all
4
Table
0
5
9-2.
MCP795WXX/MCP795BXX
High-Impedance
Preliminary
0
6
1
7
7
8
6
9
Data to STATUS Register
10
5
11
4
12
3
13
2
14
1
DS22280B-page 35
15
0
T
WC