MT47H512M8THM-25:A Micron Technology Inc, MT47H512M8THM-25:A Datasheet - Page 106
MT47H512M8THM-25:A
Manufacturer Part Number
MT47H512M8THM-25:A
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT47H512M8THM-25A.pdf
(134 pages)
Specifications of MT47H512M8THM-25:A
Lead Free Status / Rohs Status
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT47H512M8THM-25:A
Manufacturer:
MICRON
Quantity:
985
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Figure 58: Write Burst
PDF: 09005aef824f87b6
2gbddr2.pdf – Rev. F 12/10 EN
Notes:
DQS, DQS#
DQS, DQS#
DQS, DQS#
Command
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
1. Subsequent rising DQS signals must align to the clock within
2. DI b = data-in for column b.
3. Three subsequent elements of data-in are applied in the programmed order following
4. Shown with BL = 4, AL = 0, CL = 3; thus, WL = 2.
5. A10 is LOW with the WRITE command (auto precharge is disabled).
Address
DI b.
CK#
DM
DM
DM
DQ
DQ
DQ
CK
Bank a,
WRITE
Col b
T0
WL ± t DQSS
WL - t DQSS
WL + t DQSS
NOP
T1
106
DI
b
NOP
T2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
DI
b
DI
b
Transitioning Data
T2n
2Gb: x4, x8, x16 DDR2 SDRAM
t DQSS 5
NOP
T3
5
t DQSS 5
T3n
© 2006 Micron Technology, Inc. All rights reserved.
t
NOP
DQSS.
T4
Don’t Care
WRITE
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