LSM320DLTR STMicroelectronics, LSM320DLTR Datasheet - Page 15

• Manufacturer Part Number: LSM320DLTR
• Description: IC LINEAR
• Manufacturer: STMicroelectronics

Specifications of LSM320DLTR

• Lead Free Status / Rohs Status: Compliant

LSM320DL
2.4
2.4.1
Table 6.
1. Values are guaranteed at 10 MHz clock frequency for SPI with both 4 and 3 wires, based on characterization results, not
Figure 3.
3. When no communication is on-going, data on CS, SPC, SDI, and SDO are driven by internal pull-up resistors.
c. Measurement points are done at 0.2·Vdd_IO and 0.8·Vdd_IO, for both input and output ports.
SDO
CS
SPC
SDI
tested in production.
tdis(SO)
Symbol
tc(SPC)
fc(SPC)
tsu(CS)
tsu(SI)
th(SO)
th(CS)
tv(SO)
th(SI)
(3)
(3)
(3)
(3)
SPI slave timing diagram
Communication interface characteristics
SPI - serial peripheral interface
Subject to general operating conditions for Vdd and Top.
SPI slave timing values
t
su(CS)
SPI clock cycle
SPI clock frequency
CS hold time
SDI input hold time
SDO valid output time
SDO output disable time
CS setup time
SDI input setup time
SDO output hold time
t
su(SI)
MSB IN
MSB OUT
t
h(SI)
Parameter
(c)
t
v(SO)
Doc ID 018845 Rev 1
t
c(SPC)
t
h(SO)
Min.
100
15
6
8
5
9
Value
Module specifications
(1)
Max.
10
50
50
LSB IN
LSB OUT
t
h(CS)
t
dis(SO)
MHz
Unit
ns
ns
15/53
(3)
(3)
(3)
(3)