STA015$ STMicroelectronics, STA015$ Datasheet - Page 14
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STA015$
Manufacturer Part Number
STA015$
Description
DECODER AUDIO MPEG 2.5 28-SOIC
Manufacturer
STMicroelectronics
Type
Audio Decoderr
Datasheet
1.STA015T.pdf
(56 pages)
Specifications of STA015$
Applications
Sound Cards, Players, Recorders
Voltage - Supply, Digital
2.4 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply, Analog
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
STA015
Figure 14. Input from BITSTREAM, Output from GPSO
Figure 15. Input from ADC, Output from GPSO
5.0 I
The STA015 supports the I
a transmitter and any device that reads the data as a receiver. The device that controls the data transfer
is known as the master and the others as the slave. The master always starts the transfer and provides
the serial clock for synchronisation. The STA015 is always a slave device in all its communications.
5.1 COMMUNICATION PROTOCOL
3.1.0 - Data transition or change
Data changes on the SDA line must only occur when the SCL clock is low. SDA transition while the clock
is high are used to identify START or STOP condition.
5.1.1 Start condition
START is identified by a high to low transition of the data bus SDA signal while the clock signal SCL is
stable in the high state. A START condition must precede any command for data transfer.
5.1.2 Stop condition
STOP is identified by low to high transition of the data bus SDA signal while the clock signal SCL is stable
in the high state. A STOP condition terminates communications between STA015 and the bus master.
5.1.3 Acknowledge bit
An acknowledge bit is used to indicate a successful data transfer. The bus transmitter, either master or
slave, releases the SDA bus after sending 8 bit of data. During the 9th clock pulse the receiver pulls the
SDA bus low to acknowledge the receipt of 8 bits of data.
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2
C BUS SPECIFICATION
MASTER
MCU
ADC
2
MCU
GPSO_SCKR
C protocol. This protocol defines any device that sends data on to the bus as
GPSO_DATA
GPSO_REQ
LRCK_ADC
SCK_ADC
SDI_ADC
GPSO_DATA
GPSO_SCKR
GPSO_REQ
DATA_REQ
BIT_EN
SCKR
SDI
I
2
C
STA015
STA015
LFBGA64
LFBGA64
TQFP44
TQFP44
D99AU1122A
LRCKT
OCLK
SCKT
SDO
LRCKT
OCLK
SCKT
SDO
DAC
D99AU1124A
DAC