PCA9536D,118 NXP Semiconductors, PCA9536D,118 Datasheet - Page 5

• Manufacturer Part Number: PCA9536D,118
• Description: IC I/O EXPANDER I2C 4B 8SOIC
• Manufacturer: NXP Semiconductors

Specifications of PCA9536D,118

• Package / Case: 8-SOIC (3.9mm Width)
• Interface: I²C, SMBus
• Number Of I /o: 4
• Interrupt Output: No
• Frequency - Clock: 400kHz
• Voltage - Supply: 2.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Includes: POR
• Logic Family: PCA9536
• Number Of Lines (input / Output): 4.0 / 4.0
• Operating Supply Voltage: 2.3 V to 5.5 V
• Power Dissipation: 200 mW
• Operating Temperature Range: - 40 C to + 85 C
• Input Voltage: 5 V
• Logic Type: I2C, SMBus
• Maximum Clock Frequency: 400 KHz
• Mounting Style: SMD/SMT
• Number Of Input Lines: 4.0
• Number Of Output Lines: 4.0
• Output Current: 50 mA
• Output Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-3615 - DEMO BOARD I2C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-1835-2; 935277415118; PCA9536D-T

NXP Semiconductors
PCA9536_5
Product data sheet
6.1.3 Register 1 - Output Port register
6.1.4 Register 2 - Polarity Inversion register
This register reflects the outgoing logic levels of the pins defined as outputs by Register 3.
Bit values in this register have no effect on pins defined as inputs. Reads from this register
return the value that is in the flip-flop controlling the output selection, not the actual pin
value.
‘Not used’ bits can be programmed with either logic 0 or logic 1.
Table 5.
Legend: * default value
This register allows the user to invert the polarity of the Input Port register data. If a bit in
this register is set (written with ‘1’), the corresponding Input Port data is inverted. If a bit in
this register is cleared (written with a ‘0’), the Input Port data polarity is retained.
‘Not used’ bits can be programmed with either logic 0 or logic 1.
Table 6.
Legend: * default value
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
Symbol
O7
O6
O5
O4
O3
O2
O1
O0
Symbol
N7
N6
N5
N4
N3
N2
N1
N0
Register 1 - Output Port register bit description
Register 2 - Polarity Inversion register bit description
Access
R
R
R
R
R
R
R
R
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Rev. 05 — 25 January 2010
Value
1*
1*
1*
1*
1*
1*
1*
1*
Value
0*
0*
0*
0*
0*
0*
0*
0*
Description
not used
reflects outgoing logic levels of pins defined as
outputs by Register 3
Description
not used
inverts polarity of Input Port register data
0 = Input Port register data retained (default
value)
1 = Input Port register data inverted
4-bit I
2
C-bus and SMBus I/O port
PCA9536
© NXP B.V. 2010. All rights reserved.
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