STMPE811QTR STMicroelectronics, STMPE811QTR Datasheet
STMPE811QTR
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STMPE811QTR Summary of contents
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... Game consoles ■ Mobile and smartphones ■ GPS Table 1. Device summary Order code STMPE811QTR September 2010 with 8-bit GPIO expander Description The STMPE811 is a GPIO (general purpose input/output) port expander able to interface a main digital ASIC via the two-line bidirectional bus ...
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Contents Contents 1 STMPE811 functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 ...
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STMPE811 12 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of tables List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STMPE811 List of figures Figure 1. STMPE811 functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STMPE811 functional overview 1 STMPE811 functional overview The STMP811 consists of the following blocks: 2 ● and SPI interface ● Analog-to-digital converver (ADC) ● Touchscreen controller (TSC) ● Driver and switch control unit ● Temperature sensor ● GPIO ...
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STMPE811 2 Pin configuration and functions Figure 2. STMPE811 pin configuration (top through view) Table 2. Pin assignments Pin A0/Data Out ...
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Pin configuration and functions 2.1 Pin functions The STMPE811 is designed to provide maximum features and flexibility in a very small pin- count package. Most of the pins are multi-functional. the pin’s function. Table 3. Pin configuration for IN2, IN3 ...
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STMPE811 and SPI interface 3.1 Interface selection The STMPE811 interfaces with the host CPU via a I the selection of interface protocol at reset state. Figure 3. STMPE811 interface Table 5. Interface selection pins Pin 3 ...
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I2C interface interface The addressing scheme of STMPE811 is designed to allow devices to be connected 2 to the same I C bus. Figure 4. STMPE811 I GND VCC SCLK SDAT 2 Table ...
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STMPE811 2 Table timing Symbol f SCL clock frequency SCL t Clock low period LOW t Clock high period HIGH t SDA and SCL fall time F START condition hold time (after this t HD:STA period the ...
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I2C interface 2 4 features The features that are supported by the I 2 ● slave device ● Operates at 1.8 V ● Compliant to Philips I ● Supports standard (up to 100 Kbps) and fast ...
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STMPE811 4.2 Data input The device samples the data input on SDATA on the rising edge of the SCLK. The SDATA signal must be stable during the rising edge of SCLK and the SDATA signal must change only when SCLK ...
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I2C interface 4.3 Read operation A write is first performed to load the register address into the Address Counter but without sending a Stop condition. Then, the bus master sends a reStart condition and repeats the Device Address with the ...
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STMPE811 5 SPI interface The SPI (serial peripheral interface) in STMPE811 uses a 4-wire communication connection (DATA IN, DATA OUT, CLK, CS). In the diagram, “Data in” is referred to as MOSI (master out slave in) and “DATA out” is ...
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SPI interface 5.1.2 Register write The following steps need to be followed for register write through SPI. 1. Assert CS_n by driving a '0' on this pin. 2. Drive a '0' on the first SCL launch clock on MOSI to ...
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STMPE811 5.2 SPI timing modes The SPI timing modes are defined by CPHA and CPOL,CPHA and CPOL are read from the "SDAT" and "A0" pins during power-up reset. The following four modes are defined according to this setting. Table 9. ...
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SPI interface Table 10. SPI timing specification (continued) Symbol CS_n high to t CSCL first clock edge CS_n high to t tri-state on CSZ MISO Figure 7. SPI timing specification 18/65 Description Min 300 1 Doc ID 14489 Rev 3 ...
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STMPE811 6 STMPE811 registers This section lists and describes the registers of the STMPE811 device, starting with a register map and then provides detailed descriptions of register types. Table 11. Register summary map table Address Register name 0x00 CHIP_ID 0x02 ...
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STMPE811 registers Table 11. Register summary map table (continued) Address Register name 0x34 ADC_DATA_CH2 0x36 ADC_DATA_CH3 0x38 ADC_DATA_CH4 0x3A ADC_DATA_CH5 0x3C ADC_DATA_CH6 0x3E ADC_DATA_CH7 0x40 TSC_CTRL 0x41 TSC_CFG 0x42 WDW_TR_X 0x44 WDW_TR_Y 0x46 WDW_BL_X 0x48 WDW_BL_Y 0x4A FIFO_TH 0x4B FIFO_STA ...
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STMPE811 Table 11. Register summary map table (continued) Address Register name 0x61 TEMP_DATA 0x62 TEMP_TH Bit Type Reset value 8 R 0x00 8 R/W 0x00 Doc ID 14489 Rev 3 STMPE811 registers Function Temperature data access port Threshold for temperature ...
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System and identification registers 7 System and identification registers Table 12. System and identification registers map Address Register name 0x00 CHIP_ID 0x02 ID_VER 0x03 SYS_CTRL1 0x04 SYS_CTRL2 0x08 SPI_CFG CHIP_ID Address: 0x00 Type: R Reset: 0x0811 Description: 16-bit device identification ...
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STMPE811 SYS_CTRL1 Address: 0x03 Type: R/W Reset: 0x00 Description: The reset control register enables to reset the device [7:2] RESERVED [1] SOFT_RESET: Reset the STMPE811 using the serial communication interface [0] HIBERNATE: Force the device into hibernation ...
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System and identification registers SPI_CFG RESERVED Address: 0x08 Type: R/W Reset: 0x01 Description: SPI interface configuration register [7:3] RESERVED [2] AUTO_INCR: This bit defines whether the SPI transaction follows an addressing scheme that internally autoincrements or not ...
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STMPE811 8 Interrupt system The STMPE811 uses a 2-tier interrupt structure. The ADC interrupts and GPIO interrupts are ganged as a single bit in the “interrupt status register”. The interrupts from the touchscreen controller and temperature sensor can be seen ...
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Interrupt system INT_CTRL RESERVED Address: 0x09 Type: R/W Reset: 0x00 Description: The interrupt control register is used to enable the interruption from a system-related interrupt source to the host. [7:3] RESERVED [2] INT_POLARITY: This bit sets the ...
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STMPE811 INT_EN GPIO ADC TEMP_SENS FIFO_EMPTY Address: 0x0A Type: R/W Reset: 0x00 Description: The interrupt enable register is used to enable the interruption from a system related interrupt source to the host. [7] GPIO: Any enabled GPIO ...
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Interrupt system GPIO_INT_EN Address: 0x0C Type: R/W Reset: 0x10 Description: The interrupt status register monitors the status of the interruption from a particular interrupt source to the host. Regardless of whether the IER bits are enabled, the ...
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STMPE811 9 Analog-to-digital converter An 8-input,12-bit analog-to-digital converter (ADC) is integrated in the STMPE811. The ADC can be used as a generic analog-to-digital converter touchscreen controller capable of controlling a 4-wire resistive touchscreen. Table 13. ADC controller ...
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Analog-to-digital converter ADC_CTRL1 7 6 RESERVED SAMPLE_TIME2 SAMPLE_TIME1 SAMPLE_TIME0 Address: 0x20 Type: R/W Reset: 0x9C Description: ADC control register. [7] RESERVED [6:4] SAMPLE_TIMEn: ADC conversion time in number of clock 000: 36 001: 44 010: 56 011: 64 100: 80 ...
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STMPE811 ADC_CTRL2 Address: 0x21 Type: R/W Reset: 0x01 Description: ADC control. [7] RESERVED [6] RESERVED [5] RESERVED [4] RESERVED [3] RESERVED [2] RESERVED [1:0] ADC_FREQ: Selects the clock speed of ADC 00: 1.625 MHz typ. 01: 3.25 ...
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Analog-to-digital converter ADC_DATA_CHn Address: Add address Type: R/W Reset: 0x0000 Description: ADC data register 0-7 (DATA_CHn=0 -7) [11:0] DATA[11:0]: ADC channel data If TSC is enabled, CH3-0 is used for TSC and all readings to these ...
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STMPE811 10 Touchscreen controller The STMPE811 is integrated with a hard-wired touchscreen controller for 4-wire resistive type touchscreen. The touchscreen controller is able to operate completely autonomously, and interrupt the connected CPU only when a pre-defined event occurs. Figure 9. ...
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Touchscreen controller Window tracking The -WDW_X and WDW_Y registers allow to pre-set a sub-window in the touchscreen such that any touch position that is outside the sub-window is discarded. Figure 10. Window tracking FIFO FIFO has a depth of 128 ...
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STMPE811 Oversampling and averaging function The STMPE811 touchscreen controller can be configured to oversample by 2/4/8 times and provide the averaged value as final output. This feature helps to reduce the effect of surrounding noise. Table 15. Touchscreen controller register ...
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Touchscreen controller TSC_CTRL TSC_STA TRACK Address: 0x40 Type: R/W Reset: 0x90 Description: 4-wire touchscreen controller (TSC) setup. [7] TSC_STA: TSC status Reads '1' when touch is detected Reads '0' when touch is not detected Writing to this ...
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STMPE811 TSC_CFG TOUCH_DET AVE_CTRL_1 AVE_CTRL_0 _DELAY_2 Address: 0x41 Type: R/W Description: Touchscreen controller configuration register. [7:6] [AVE_CTRL_1/0: Average control 00=1 sample 01=2 samples 10=4 samples 11=8 samples [5:3] TOUCH_DET_DELAY_2/1/0: Touch detect delay 000 - 10 μs 001 ...
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Touchscreen controller WDW_TR_X 7 Address: 0x42 Type: R/W Reset: 0x0FFF Description: Window setup for top right X coordinates [11:0] TR_X: Bit 11:0 of top right X coordinates WDW_TR_Y 7 Address: 0x44 Type: R/W Reset: 0x0FFF Description: Window setup for top ...
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STMPE811 WDW_BL_X 7 Address: 0x46 Type: R/W Reset: 0x0000 Description: Window setup for bottom left X coordinates [11:0] BL_X: Bit 11:0 of bottom left X coordinates WDW_BL_Y 7 Address: 0x48 Type: R/W Reset: 0x0000 Description: Window setup for bottom left ...
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Touchscreen controller FIFO_STA 7 6 FIFO_OFLOW FIFO_FULL FIFO_EMPTY Address: 0x4B Type: R/W Reset: 0x20 Description: Current status of FIFO.. [7] FIFO_OFLOW: Reads 1 if FIFO is overflow [6] FIFO_FULL: Reads 1 if FIFO is full [5] FIFO_EMPTY: Reads 1 if ...
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STMPE811 TSC_DATA_X Address: 0x4D Type: R Reset: 0x0000 Description: Bit 11 data. [11:0] DATAY[11:0]: Bit 11 data DATAY[11:0] Doc ID 14489 Rev 3 Touchscreen controller TSC_DATA_X 3 2 ...
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Touchscreen controller TSC_DATA_Y Address: 0x4F Type: R Reset: 0x0000 Description: Bit 11 data. [11:0] DATAY[11:0]: bit 11 data TSC_DATA_Z Address: 0x51 Type: R Reset: 0x0000 Description: Bit 7:0 of ...
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STMPE811 TSC_DATA_XYZ Address: 0x57 (auto-increment), 0xD7 (non-auto-increment) Type: R Reset: 0x00 Description: Data port for TSC data access [11:0] DATA: data bytes from TSC FIFO The data format from the TSC_DATA register depends on the setting of ...
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Touchscreen controller TSC_FRACTION_Z RESERVED Address: 0x56 Type: R Reset: 0x00 Description: This register allows to select the range and accuracy of the pressure measurement [7:3] RESERVED [2:0] FRACTION_Z: 000: Fractional part is 0, whole part is 8 ...
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STMPE811 TSC_I_DRIVE Address: 0x58 Type: R/W Reset: 0x00 Description: This register sets the current limit value of the touchscreen drivers [7:1] RESERVED [0] DRIVE: maximum current on the touchscreen controller (TSC) driving channel typical, ...
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Touchscreen controller programming sequence 11 Touchscreen controller programming sequence The following are the steps to configure the touchscreen controller (TSC): a) Disable the clock gating for the touchscreen controller and ADC in the SYS_CFG2 register. b) Configure the touchscreen operating ...
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STMPE811 Z value. With the Z value obtained from the register, the user simply needs to multiply the Z value with the touchscreen panel resistance to obtain the touch resistance. o) The TSC_DATA register allows facilitation of another reading format ...
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Temperature sensor 12 Temperature sensor The STMPE811 internal temperature sensor can be used as a reference for compensation of the touchscreen parameters. Temperature measurement is optimised for temperature ° ° from Table 17. Touchscreen parameters Address ...
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STMPE811 TEMP_DATA Address: 0x61 Type: R Reset: 0x00 Description: Temperature data access port [11:0] TEMPERATURE: Temperature reading Absolute temperature = ( V * temperature [11: 7.51 (12-bit ADC temperature ...
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GPIO controller 13 GPIO controller A total of 8 GPIOs are available in the STMPE811 port expander device. Most of the GPIOs share physical pins with some alternate functions. The GPIO controller contains the registers that allow the host system ...
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STMPE811 GPIO_SET_PIN Address: 0x10 Type: R/W Reset: 0x00 Description: GPIO set pin register. Writing 1 to this bit causes the corresponding GPIO state. Writing 0 has no effect. GPIO_CLR_PIN Address: 0x11 Type: R/W Reset: 0x00 Description: ...
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GPIO controller GPIO_ED_STA Address: 0x14 Type: R/W Reset: 0x00 Description: GPIO edge detect status register. An edge transition has been detected. GPIO_RE Address: 0x15 Type: R/W Reset: 0x00 Description: GPIO rising edge detection enable register. Setting this bit to ‘1’ ...
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STMPE811 13.0.2 Power-up reset (POR) The STMPE811 is equipped with an internal POR circuit that holds the device in reset state, until the V supply input is valid. The internal POR is tied to the power-up reset, ...
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Maximum rating 14 Maximum rating Stressing the device above the ratings listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only, and operation of the device at these or any other ...
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STMPE811 14.1 Recommended operating conditions Table 20. Power consumption Symbol Parameter Vcc Core supply voltage V I/O supply voltage IO I Core supply current CC-active I I/O supply current IO-active I I/O supply current IO-active I CC- Core supply current ...
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Electrical specifications 15 Electrical specifications Table 21. DC electrical characteristics (-40 standard JESD-8-7) Symbol V Input voltage low state IL V Input voltage high state IH Output voltage low state Output voltage high V OH state V ...
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STMPE811 Table 23. ADC specification (-40 Parameter Full-scale input span Absolute input range Input capacitance Leakage current Resolution No missing codes Integral linearity error Offset error Gain error Noise Power supply rejection ratio Throughput rate Table 24. Switch drivers specification ...
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Package mechanical data 16 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available ...
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STMPE811 Figure 12. Package outline for QFN16 ( mm) - 0.50 pitch 1. Drawing not to scale. Doc ID 14489 Rev 3 Package mechanical data 7185330_F 59/65 ...
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Package mechanical data Table 26. Package mechanical data for QFN16 ( mm) - 0.50 pitch Symbol ddd Table 27. Exposed pad variation Symbol D2 ...
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STMPE811 Figure 13. Recommended footprint 1. Drawing not to scale. Table 28. Footprint dimensions Symbol Millimeters Min Typ − 3.8 − 3.8 − 0.5 − 0.3 − 0.8 − 1.5 − 0.35 Doc ...
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Package mechanical data Figure 14. Carrier tape for QFN16 ( mm) - 0.50 pitch 1. Drawing not to scale. 62/65 Doc ID 14489 Rev 3 STMPE811 7875978 ...
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STMPE811 Figure 15. Reel information for QFN16 ( mm) - 0.50 pitch 1. Drawing not to scale. Doc ID 14489 Rev 3 Package mechanical data 7875978_14 63/65 ...
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Revision history 17 Revision history Table 29. Document revision history Date 09-Jun-2008 22-Apr-2009 22-Sep-2010 64/65 Revision 1 Initial release. Document status promoted from preliminary data to datasheet. Modified: title and package silhouette in the cover page. Section 6: STMPE811 registers, ...
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... STMPE811 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...