PCA8574AD,518 NXP Semiconductors, PCA8574AD,518 Datasheet - Page 10

• Manufacturer Part Number: PCA8574AD,518
• Description: IC I/O EXPANDER I2C 8B 16SOIC
• Manufacturer: NXP Semiconductors

Specifications of PCA8574AD,518

• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Interface: I²C
• Number Of I /o: 8
• Interrupt Output: Yes
• Frequency - Clock: 400kHz
• Voltage - Supply: 2.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Includes: POR
• Logic Family: PCA
• Operating Supply Voltage: 2.3 V to 5.5 V
• Power Dissipation: 400 mW
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Output Current: 50 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935283489518; PCA8574AD-T; PCA8574AD-T

NXP Semiconductors
9. Characteristics of the I
PCA8574_PCA8574A_2
Product data sheet
9.1.1 START and STOP conditions
9.1 Bit transfer
9.2 System configuration
The I
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (see
A device generating a message is a ‘transmitter’; a device receiving is the ‘receiver’. The
device that controls the message is the ‘master’ and the devices which are controlled by
the master are the ‘slaves’ (see
Fig 11. Bit transfer
Fig 12. Definition of START and STOP conditions
2
C-bus is for 2-way, 2-line communication between different ICs or modules. The two
SDA
SCL
START condition
2
SDA
SCL
Figure
C-bus
S
Rev. 02 — 14 May 2007
12.)
Figure
Remote 8-bit I/O expander for I
data valid
data line
stable;
13).
Figure
allowed
change
of data
11).
PCA8574/74A
STOP condition
mba607
2
P
C-bus with interrupt
© NXP B.V. 2007. All rights reserved.
mba608
SDA
SCL
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