PCA9538D,118 NXP Semiconductors, PCA9538D,118 Datasheet - Page 5

• Manufacturer Part Number: PCA9538D,118
• Description: IC I/O EXPANDER I2C 8B 16SOIC
• Manufacturer: NXP Semiconductors

Specifications of PCA9538D,118

• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Interface: I²C, SMBus
• Number Of I /o: 8
• Interrupt Output: Yes
• Frequency - Clock: 400kHz
• Voltage - Supply: 2.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Includes: POR
• Logic Family: PCA9538
• Number Of Lines (input / Output): 8.0 / 8.0
• Operating Supply Voltage: 2.3 V to 5.5 V
• Power Dissipation: 200 mW
• Operating Temperature Range: - 40 C to + 85 C
• Input Voltage: 5 V
• Logic Type: I2C, SMBus
• Maximum Clock Frequency: 400 KHz
• Mounting Style: SMD/SMT
• Number Of Input Lines: 8.0
• Number Of Output Lines: 8.0
• Output Current: 50 mA
• Output Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-1839-2; 935277418118; PCA9538D-T

NXP Semiconductors
6. Functional description
PCA9538_5
Product data sheet
6.2.1 Command byte
6.2.2 Register 0 - Input Port register
6.1 Device address
6.2 Registers
Refer to
The command byte is the first byte to follow the address byte during a write transmission.
It is used as a pointer to determine which of the registers will be written or read.
Table 3.
This register is a read-only port. It reflects the incoming logic levels of the pins, regardless
of whether the pin is defined as an input or an output by Register 3. Writes to this register
have no effect.
The default value ‘X’ is determined by the externally applied logic level.
Table 4.
Legend: * default value.
Command
0
1
2
3
Bit
7
6
5
4
3
2
1
0
Fig 5.
Symbol
I7
I6
I5
I4
I3
I2
I1
I0
Figure 1 “Block diagram of
PCA9538 address
Command byte
Register 0 - Input Port register bit description
Protocol
read byte
read/write byte
read/write byte
read/write byte
8-bit I
Access
read only
read only
read only
read only
read only
read only
read only
read only
2
Rev. 05 — 28 May 2009
C-bus and SMBus low power I/O port with interrupt and reset
1
Value
X*
X*
X*
X*
X*
X*
X*
X*
Function
Input Port register
Output Port register
Polarity Inversion register
Configuration register
1
PCA9538”.
fixed
slave address
1
0
Description
value ‘X’ is determined by externally applied
logic level
0
selectable
hardware
A1
002aae707
A0
R/W
PCA9538
© NXP B.V. 2009. All rights reserved.
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