PCA9502BS,128 NXP Semiconductors, PCA9502BS,128 Datasheet - Page 17
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PCA9502BS,128
Manufacturer Part Number
PCA9502BS,128
Description
IC I/O EXPANDER I2C/SPI 24HVQFN
Manufacturer
NXP Semiconductors
Datasheet
1.PCA9502BS157.pdf
(25 pages)
Specifications of PCA9502BS,128
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Interface
I²C, SPI
Number Of I /o
8
Interrupt Output
No
Frequency - Clock
400kHz
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Logic Family
PCA9502
Number Of Lines (input / Output)
8.0 / 8.0
Operating Supply Voltage
2.5 V to 3.3 V
Power Dissipation
300 mW
Operating Temperature Range
- 40 C to + 85 C
Input Voltage
5.5 V
Logic Type
I/O Expander
Maximum Clock Frequency
400 KHz
Mounting Style
SMD/SMT
Number Of Input Lines
8.0
Number Of Output Lines
8.0
Output Current
10 mA
Output Voltage
5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935281363128
PCA9502BS-F
PCA9502BS-F
PCA9502BS-F
PCA9502BS-F
NXP Semiconductors
Table 17.
All the timing limits are valid within the operating supply voltage, ambient temperature range and output load;
V
All output load = 25 pF, unless otherwise specified.
PCA9502_3
Product data sheet
Symbol
t
t
t
t
t
t
T
t
t
t
t
t
d(CS_NH-SOZ)
su(CS_N-SCLK)
h(CS_N-SCLK)
d(SCLK-SO)
su(SI-SCLK)
h(SI-SCLK)
SCLKH
SCLKL
w(CS_NH)
d9
d13
DD
Fig 16. Detailed SPI-bus timing
Fig 17. SPI write IOState to GPIO switch
SCLK
SCLK
SO
CS
= (2.5 V
SI
R/W = 0; A[3:0] = IOState (0x0B)
t
h(CS_N-SCLK)
GPIOn
SPI-bus timing specifications
SCLK
CS
t
su(SI-SCLK)
0.2 V) or (3.3 V
SI
Parameter
CS HIGH to SO 3-state delay time
CS to SCLK setup time
CS to SCLK hold time
SCLK fall to SO valid delay time
SI to SCLK setup time
SI to SCLK hold time
SCLK period
SCLK HIGH time
SCLK LOW time
CS HIGH pulse width
SPI output data valid time
SPI interrupt clear time
t
R/W
su(CS_N-SCLK)
A3
0.3 V); T
A2
t
h(SI-SCLK)
A1
t
SCLKL
amb
A0
= 40 C to +85 C; and refer to V
0
Rev. 03 — 13 October 2006
t
SCLKH
0
Conditions
C
C
t
SCLKL
L
L
X
= 100 pF
= 100 pF
+ t
D7
SCLKL
D6
t
d(SCLK-SO)
D5
8-bit I/O expander with I
D4
IL
D3
and V
Min
100
200
200
200
20
10
10
83
30
30
V
-
-
DD
D2
IH
= 2.5 V
with an input voltage of V
D1
Max
100
25
-
-
-
-
-
-
-
-
-
-
t
h(CS_N-SCLK)
t
d9
t
D0
d(CS_N-SOZ)
2
Min
100
200
200
200
C-bus/SPI interface
20
20
10
67
25
25
V
-
-
PCA9502
DD
© NXP B.V. 2006. All rights reserved.
002aab878
= 3.3 V
t
w(CS_NH)
Max
100
20
-
-
-
-
-
-
-
-
-
-
SS
002aac429
to V
17 of 25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DD
.