MAX7316ATE+T Maxim Integrated Products, MAX7316ATE+T Datasheet - Page 13
![IC I/O EXPANDER I2C 16B 16TQFN](/photos/6/66/66625/16-tqfn_exp_pad_21-0136_sml.jpg)
MAX7316ATE+T
Manufacturer Part Number
MAX7316ATE+T
Description
IC I/O EXPANDER I2C 16B 16TQFN
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX7316AEE.pdf
(24 pages)
Specifications of MAX7316ATE+T
Interface
I²C, SMBus
Number Of I /o
10
Interrupt Output
Yes
Frequency - Clock
400kHz
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 4. Configuration Register
X = Don’t care.
and by D3–D0 of register 0x0E for INT/O8
INT/O8 output is high impedance (blink is
Disable global intensity control—intensity
is set by registers 0x10–0x13 for ports P0
Control, Interrupt, and Hot-Insertion Protection
Enable global intensity control—intensity
outp ut i s contr ol l ed b y the O 0 and O 1 b i ts
INT/O8 output is high impedance during
INT/O8 output is high impedance during
through P7 when configured as outputs,
INT/O8 outp ut i s l ow d ur i ng b l i nk p hase 0
INT/O8 outp ut i s l ow d ur i ng b l i nk p hase 1
for all ports configured as outputs is set
Enable data change interrupt—INT/O8
INT/O8 output is low (blink is disabled)
D i sab l e d ata chang e i nter r up t—INT/O8
output is controlled by port input data
when INT/O8 pin is configured as an
Read back device configuration
Flip blink register (see text)
Write device configuration
by D3–D0 of register 0x0E
CONFIGURATION
blink phase 0
blink phase 1
Disable blink
Enable blink
REGISTER
output port
disabled)
change
______________________________________________________________________________________
10-Port I/O Expander with LED Intensity
R/W
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0
1
ADDRESS
CODE
(HEX)
0x0F
INT
D7
X
X
X
X
X
X
X
X
X
X
X
X
X
X
BLINK
D6
X
X
X
X
X
X
X
X
X
X
X
X
X
X
D5
O1
X
X
X
X
X
X
X
X
X
X
X
X
0
1
REGISTER DATA
D4
O0
X
X
X
X
X
X
X
X
X
X
0
1
0
1
D3
X
X
X
X
X
X
0
1
0
0
0
0
0
0
I
D2
G
X
X
X
X
0
1
X
X
X
X
X
X
X
X
D1
B
X
X
X
X
X
X
X
X
X
X
X
X
0
1
D0
E
0
1
1
1
X
X
X
X
0
0
1
1
1
1
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