SI2401-FS Silicon Laboratories Inc, SI2401-FS Datasheet

IC ISOMODEM SYSTEM-SIDE 16SOIC

SI2401-FS

Manufacturer Part Number
SI2401-FS
Description
IC ISOMODEM SYSTEM-SIDE 16SOIC
Manufacturer
Silicon Laboratories Inc
Type
Integrated Global DAAr
Datasheets

Specifications of SI2401-FS

Package / Case
16-SOIC (3.9mm Width)
Data Format
V.21, V.22, V.23, Bell 103, Bell 212A
Baud Rates
2.4k
Interface
UART
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Product
Modem Chip
Supply Voltage (min)
3 V
Supply Current
15 mA
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 10 C
Mounting Style
SMD/SMT
Package
16SOIC
Main Category
Chipset
Sub-category
ISOmodem
Maximum Data Rate
2.4 Kbps
Typical Operating Supply Voltage
3.3 V
Power Supply Type
Digital
Typical Supply Current
10 mA
Minimum Operating Supply Voltage
3 V
Maximum Operating Supply Voltage
3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1167 - BOARD EVAL SI2401 UART INTERFACE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
336-1095

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V. 22
Features
Applications
Description
The Si2401 ISOmodem
integrating
arrangement (DAA), which provides a globally-programmable telephone
line interface with an unprecedented level of integration. Available in two
small packages, this compact solution eliminates the need for a separate
DSP data pump, modem controller, codec, isolation transformer, relay,
opto-isolators, and 2–4 wire hybrid. The Si2401 provides conventional
data formats at connect rates of up to 2400 bps with full-duplex operation
over the Public Switched Telephone Network (PSTN). This device is ideal
for embedded modem applications due to its small size, minimal external
component count, and low power consumption.
Functional Block Diagram
Rev. 1.1 2/06
Data modem formats
27 MHz CLKIN support
Caller ID detection and decode
UART with flow control
Set-top boxes
Point-of-sale
2400 bps: V.22bis
1200 bps: V.22, V.23, Bell 212A
300 bps: V.21, Bell 103
Fast connect and V.23 reversing
SIA and other security protocols
B I S
Silicon
INT/GPIO4
CD/GPIO2
RI/GPIO5
RESET
I S O
XTALI
XOUT
RXD
TXD
CTS
Laboratories’
®
M O D E M
is a complete, two-chip, 2400 bps modem
Interface
Control
Interface
ATM terminals
Security systems
Clock
Si2401
(Data Pump)
Call Progress)
(AT Decoder,
µ Controller
Copyright
DSP
fourth-generation
Integrated DAA
AT command set support
Call progress support
3.3 V Power
Lead-free and RoHS-compliant
packages
®
Over 6000 V capacitive isolation
Parallel phone detection
Compliant with FCC, China, JATE, and
Line-in-use detection
31 other PTTs
W I T H
©
2006 by Silicon Laboratories
Medical monitoring
Power meters
L
phone
line
To
direct
O W
- C
access
S i 2 4 0 1 / S i 3 0 0 8
O S T
U.S. Patent #5,870,046
U.S. Patent #6,061,009
Other patents pending
CLKIN/XTALI
D A A
GPIO5/RI
RESET
XTALO
VREG
Ordering Information
RXD
CTS
TXD
C1B
C2B
CID
Pin Assignments
V
D
See page 66.
1
2
3
4
5
6
7
8
1
2
3
4
Si2401
Si3008
IGND
9
16
15
14
13
12
11
10
9
8
7
6
5
Si2401-Si3008
GPIO2/CD
GND
GPIO4/INT/AOUT
C1A
C2A
GPIO1/EOFR
GPIO3/ESC
V
A
RX
DCT
QB
QE

Related parts for SI2401-FS

SI2401-FS Summary of contents

Page 1

... DSP data pump, modem controller, codec, isolation transformer, relay, opto-isolators, and 2–4 wire hybrid. The Si2401 provides conventional data formats at connect rates 2400 bps with full-duplex operation over the Public Switched Telephone Network (PSTN). This device is ideal for embedded modem applications due to its small size, minimal external component count, and low power consumption ...

Page 2

... Si2401/Si3008 2 Rev. 1.1 ...

Page 3

... Section 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 2. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 3. Bill of Materials: Si2401/08 Chipset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.1. Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.2. Configurations and Data Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.3. Low Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.4. Parallel Phone Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.5. Interrupt Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.6. V.23 Operation/V.23 Reversing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.7. V.42 HDLC Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4 ...

Page 4

... All minimum and maximum specifications are guaranteed and apply across the recommended operating conditions. Typical values apply at nominal supply voltages and an operating temperature of 25 °C unless otherwise stated. 3. The digital supply operates from 3.0 to 3.6 V. The Si2401 interface supports 5 V logic (CLKIN/XTALI supports 3 logic only). ...

Page 5

... pin SEB[ ATZ D I SF1[5] =1, D SF1[ 600 Ω μF – Rev. 1.1 Si2401/Si3008 Min Typ Max Unit 2.0 — — V — — 0.8 V 2.4 — — V — — 0.35 V — — 0.6 V –10 — 10 µA 50 100 200 kΩ — — ...

Page 6

... Si2401/Si3008 Table 4. AC Characteristics (V = 3 °C for K-Grade kHz Parameter Sample Rate Clock Input Frequency Clock Input Frequency Receive Frequency Response 1 Transmit Full Scale Level 1,2 Receive Full Scale Level 3,4,5 Dynamic Range 3,4,5 Dynamic Range Transmit Total Harmonic 5,6 ...

Page 7

... Table 5. Absolute Maximum Ratings Parameter DC Supply Voltage Input Current, Si2401 Digital Input Pins Digital Input Voltage CLKIN/XTALI Input Voltage Operating Temperature Range Storage Temperature Range Note: Permanent device damage may occur if the absolute maximum ratings are exceeded. Functional operation should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...

Page 8

... Si2401/Si3008 Table 6. Switching Characteristics for F-Grade (V = 3 ° Parameter Baud Rate Accuracy CTS ↓ Active to Start Bit↓ RESET Pulse Width RESET ↑ to TXD ↓ Note: All timing is referenced to the 50% level of the waveform. Input test levels are V RXD 8-Bit Data ...

Page 9

... Typical Application Schematic epad IGND GND Rev. 1.1 Si2401/Si3008 9 ...

Page 10

... Si2401/Si3008 3. Bill of Materials: Si2401/08 Chipset Component C1 C5, C50 C8 C11 2 C40, C41 C51 3 D1, D2 Dual Diode, 225 mA, 300 V, CMPD2004S FB1, FB2 Q1 RV1 R5 R7, R8 R10 R12, R13 7 R15, R16 R18 R19 1 R20, R21 U1 U2 4.9152 MHz, 20 pF, 100 ppm, 150 Ω ESR 2,8 ...

Page 11

... RS-232 or USB interface. This allows for evaluation of the modem immediately upon powerup via HyperTerminal or any standard terminal software. In addition, the Si2401 has been designed to meet the most stringent worldwide requirements for out-of-band energy, billing-tone immunity, high-voltage surges, and safety requirements. ...

Page 12

... SIA—Pulse SIA Format *Note: The Si2401 only adjusts its DCE rate from 2400 bps to 1200 bps connecting to a V.22-only (1200 bps only) modem. Since the V.22bis specification does not outline a fallback procedure, the host should implement a fallback mechanism consisting of hanging up and connecting at a lower baud rate. Retraining to accommodate changes in line conditions that occur during a call must be implemented by terminating the call and redialing ...

Page 13

... DTE rate determined by the SE0[2:0] (SD) setting and terminates with a stop bit. Data from the host for transmission to the remote modem is shifted to the Si2401 on TXD beginning with a start bit, LSB first at the DTE rate determined by the SE0[2:0] setting and terminates with a stop bit. ...

Page 14

... DTE rate determined by the S-Register SE0[2:0] (SD) setting) and terminates with a stop bit. After the middle of the stop bit time, the Si2401 begins looking for a logic 1 to logic 0 transition signaling the start of the next character on TXD to be sent to the line (remote modem) ...

Page 15

... DAA operation, S09[4] (NLD) is set. During this event, if the NLR result code is enabled by setting S62[1](NLR the “l” result code is sent. Once the loop current returns to a normal current state, the “L” Rev. 1.1 Si2401/Si3008 ( loss-of-phone-line voltage/ ...

Page 16

... TIES, or ninth bit escape) to the master modem. Note: The host can initiate a turnaround only if the Si2401 is the master. The host then sends the ATRO command to the Si2401 to initiate a V.23 turnaround and return to the online (data) mode ...

Page 17

... If CTS is used to cause a host interrupt, this final configures the b interrupt should be ignored by the host. 3. When the Si2401 is ready to send the next byte has not yet received any data from the host, it recognizes this as an end-of-frame, raise CTS, calculates the final CRC code, transmits the code, and begins transmitting stop flags ...

Page 18

... The PLL has a settling time of ~1 ms. Data on RXD should not be sent to the device prior to settling of the PLL. By default, the Si2401 assumes a 4.9152 MHz clock input MHz clock on XTALI is used, a pulldown resistor <10 kΩ must be placed between GPIO4 (Si2401, pin 11) and GND ...

Page 19

... TASL Answer Tone Length (only used in S1E [TATL] = 0x00) S35 RSOL Receive V.22 Scrambled Ones Length Function Units 1 s 5/3 ms 5/3 ms 53.3 ms 5/3 ms 5/3 ms (256) 5/3 ms 5/3 ms 5/3 ms Rev. 1.1 Si2401/Si3008 Default Fast Connect 0x03 00 0x2D 00 0x5D 00 0x09 00 0xA2 00 0xCB 00 0x08 00 ...

Page 20

... The following section describes the AT command set available in command mode. The Si2401 supports a subset of the typical modem AT command set since it is intended for use with a dedicated microcontroller instead of general terminal applications. AT commands begin with the letters AT and are followed directly (no space) by the command ...

Page 21

... In the above example, the Si2401 dials the first digit “1” using DTMF dialing. The “,” is used to pause in order to ensure that the central office has had time to accept the DTMF digit “ ...

Page 22

... This command does not wait for a carriage return <CR> before taking effect. Note: Two digits must always be entered for both “R” and “N”. SR? Read an S register. This command causes the Si2401 22 to echo the value of the S-register specified hex format. R must be a hexidecimal number. ...

Page 23

... DTMF tones containing the first message data and listens for a Kissoff Tone Kissoff Tone shorter than or equal to the value stored in S36(KTL) (default = 1 second) is detected, the Si2401 echoes a “K”. A “k” is echoed if the length of the Kissoff Tone is longer than the S36(KTL) value. The controller can then send the next message. All messages must be preceded by a “ ...

Page 24

... If tonal acknowledgement is not used, the host can toggle the ESCAPE pin to place the Si2401 in the command mode and issue an “ATX2” “ATX3” command to reverse data direction. ...

Page 25

... Automatic Call Progress Detection The Si2401 has the ability to detect dial, busy, and ringback tones automatically. The following is a description of the algorithms implemented for these three tones. Dial Tone. The dial tone detector looks for a dial tone after going off-hook and before dialing is initiated ...

Page 26

... Si2401/Si3008 Table 16. Si2401 Global Ringer and Busy Tone Cadence Settings Country China Hong Kong Hungary India Japan, Korea Malaysia Mexico Singapore Taiwan U.S., Canada (default) At this point, users may program their own algorithm to monitor the detected tones. If the host wishes to dial, it ...

Page 27

... SE5 and SE6 depending on whether they are being written to or read from. Care must be exercised when writing to DSP registers. DSP registers can only be written while the Si2401 is on-hook and in the command mode. Writing to any register address not listed in Tables 18 and 19 or writing out-of-range values is likely to cause the DSP to exhibit unpredictable behavior ...

Page 28

... Si2401/Si3008 Name DSP Reg. Addr. 0x0002 XMTL DAA modem full-scale transmit level, default = –10 dBm. 0x0003 DTML DTMF high-tone transmit level, default = –5.5 dBm. 0x0004 DTMT DTMF twist ratio (low/high), default = –2 dBm. 0x0005 UFRQ User-defined transmit tone frequency. See register SE5 (SE8=0x02 (Write Only)). ...

Page 29

... Rev. 1.1 Si2401/Si3008 SE5 Description DSP register address bits [7:0] DDL DSP register data bits [7: DSP data available 6 = Tone detected 5 = Reserved 4:0 = Tone type 7 = Reserved 6:3 = DTMF tone to transmit 2:0 = Tone type ...

Page 30

... Si2401/Si3008 Filter Input Filter CPCD CPSQ Filter A Figure 5. Programmable Call Progress Filter Architecture 30 CPCD 1 Energy 0 Detect B Max (A,B) A Energy Detect 20log Rev. 1.1 A Hysteresis TDET A > (4096/CPDL) –43 dBm 10 ...

Page 31

... This is a bit-mapped register. Busy tone on. Time that the busy tone must be on (10 ms units) for busy tone detector. Busy tone off. Time that the busy tone must be off (10 ms units) for busy tone detector. Rev. 1.1 Si2401/Si3008 Reset 0x00 0x02 0x03 0x0E ...

Page 32

... Si2401/Si3008 Table 21. S-Register Summary (Continued) “S” Register Name Register Address (hex) S18 0x18 BTOD S19 0x19 RTON S1A 0x1A RTOF S1B 0x1B RTOD S1C 0x1C DTT S1E 0x1E TATL S1F 0x1F ARM3 S20 0x20 UNL S21 0x21 TSOD S22 0x22 ...

Page 33

... V.22 (1200 bps) modem must detect 1200 bps scrambled ones during a V.22 handshake. Second kissoff tone detector length. The security modes, A1 and !1, echo a “k” kissoff tone longer than the value stored in SKDTL is detected (10 ms units). Rev. 1.1 Si2401/Si3008 Reset 0x08 , this register sets 0x00 b ...

Page 34

... Si2401/Si3008 Table 21. S-Register Summary (Continued) “S” Register Name Register Address (hex) S37 0x37 CDR S39 0x39 CDT S3A 0x3A ATD S3B 0x3B RP S3C 0x3C CIDG S62 0x62 RC S82 0x82 IST SDB 0xDB LVS SDF 0xDF DGSR SE0 0xE0 CF1 SE1 ...

Page 35

... This is a bit mapped register. * This is a bit mapped register. * This is a bit mapped register. * This is a bit mapped register. * This is a bit mapped register. * This is a bit mapped register. Rev. 1.1 Si2401/Si3008 Reset 0x00 0x88 0x19 0x16 0x40 0x0C 0x00 0x00 0x0F 0x00 ...

Page 36

... Si2401/Si3008 Table 22. Bit Mapped Register Summary “S” Register Register Bit 7 Register Address Name (hex) S07 0x07 MF1 S08 0x08 INTM CDM S09 0x09 INTS CD S0C 0x0C MF2 CDE S0D 0x0D MF3 S11 0x11 OFHI S13 0x13 MF4 S15 0x15 MLC ...

Page 37

... Address Name (hex) SF4 0xF4 DAA4 SF5 0xF5 DAA5 SF8 0xF8 DAA8 SF9 0xF9 DAA9 SFC 0xFC DAAFC CTSM Bit 6 Bit 5 Bit 4 Bit 3 ARL[1:0] LRV[3:0] Rev. 1.1 Si2401/Si3008 Bit 2 Bit 1 Bit 0 Default Binary ATL[1:0] 0000_1111 RT 0000_0000 — OVL ROV 0010_0000 0000_0000 37 ...

Page 38

... Si2401/Si3008 S07 (MF1). Modem Functions 1 Bit D7 D6 Name BD Type R/W Reset settings = 0000_0110 (0x06) Bit Name 7 Reserved Read returns zero Blind Dialing Disable Enable (Blind dialing occurs immediately after “ATDT#” command). 5 V23R V.23 Receive.* V.23 75 bps send/600 (BAUD = 0) or 1200 (BAUD = 1) bps receive. ...

Page 39

... A low to high transition in CID (S09, bit 2) activates INT. 1 Reserved Read returns zero. 0 REVM V.23 Reversal Detect Mask Change in REV does not affect INT low to high transition in REV (S09, bit 0) activates INT PPDM NVDM RIM R/W R/W R/W Function Rev. 1.1 Si2401/Si3008 CIDM REVM R/W R/W R/W 39 ...

Page 40

... No Phone Line Detect (sticky). No line phone detected. Clears on :I read Ring Indicator (sticky). Active high bit when the Si2401 is on-hook, indicates ring event has occurred. Clears on :I read. 2 CID Caller ID (sticky). Caller ID preamble has been detected; data soon follows. Clears on :I read. ...

Page 41

... CIDM[1:0] Caller ID Monitor Caller ID monitor disabled Caller ID monitor enabled. Si2401 must detect channel seizure signal followed by marks in order to report caller ID data. (Normal Bellcore caller ID Reserved Caller ID monitor enabled. Si2401 must only detect marks in order to report caller ID data. 4 Reserved Read returns zero. 3 9BF Ninth Bit Function ...

Page 42

... Si2401/Si3008 SOD (MF3). Modem Functions 3 Bit D7 D6 Name RI Type R/W Reset settings = 0000_0000 (0x00) Bit Name 7 Reserved Read returns zero Ring Indicator Control. Specifies the functionality of pin3 Pin 3 functions as GPIO5 controlled by register SE1 Pin 3 functions as RI. RI asserts during a ring and negates when no ring is present ...

Page 43

... Differential. 3 Reserved Read returns zero. 2 CIDB British Telecom Caller ID Decode Disable Enable. When set, SOC[6:5] is overwritten by the modem, as needed. 1 HDEN HDLC Framing Disable Enable. 0 Reserved Read returns zero Function OFHD R/W R/W Function Rev. 1.1 Si2401/Si3008 DCL[3:0] R CIDB HDEN R/W R/W 43 ...

Page 44

... Si2401/Si3008 S15 (MLC). Modem Link Control Bit D7 D6 Name ATPRE VCTE Type R/W R/W Reset settings = 0000_0100 (0x04) Bit Name 7 ATPRE Answer Tone Phase Reversal Disable Enable answer tone phase reversal. 6 VCTE V.25 Calling Tone Disable Enable V.25 calling tone. 5 FHGE 550 Hz Guardtone ...

Page 45

... Reserved Read returns 0. 2:0 CIDG[2:0] Caller ID Gain. The Si2401 dynamically sets the On-Hook Analog Receive Gain SF4[6:4] (ARG) to CIDG during a caller ID event (or continuously if S0C[6:5] (CIDM = 11). This field should be set prior to caller ID operation. 000 = 0 dB 001 = 3 dB 010 = 6 dB 011 = 9 dB ...

Page 46

... Si2401/Si3008 S62 (RC). Result Codes Override Bit D7 D6 Name OCR Type R/W Reset settings = 0100_0001 (0x41) Bit Name 7 Reserved Read returns zero. 6 OCR Overcurrent Result Code (“x”). 0 = Enable Disable. 5:3 Reserved Read returns zero Intrusion Result Code (“I” and “i”). ...

Page 47

... Intrusion disabled from start of dial to register S29 time out Intrusion disabled from start of dial to carrier detect or to “N” or “n” result code. 0 Reserved Read returns zero LCLD R/W Function ® chipset goes off-hook and the off-hook intrusion Rev. 1.1 Si2401/Si3008 IB[1:0] R/W 47 ...

Page 48

... Si2401/Si3008 SDF (DGSR). Intrusion Deglitch Bit D7 D6 Name Type Reset settings = 0000_1100 (0x0C) Bit Name 7 Reserved Read returns zero. 6:0 DGSR[6:0] Deglitch Sample Rate. Sets the sample rate for the deglitch algorithm and the off-hook intrusion algorithm (40 ms units). 0000000 = Disables the deglitch algorithm, and sets the off-hook intrusion sample rate to 200 ms and delay between compared samples to 800 ms ...

Page 49

... Digital output (relay drive; also used for CD function Reserved Digital input. 1:0 GPIO1[1:0] GPIO1 Digital input Digital output (relay drive Reserved Reserved. *Note used as a GPIO pin; SE4[3] (GPE) must equal zero Function GPIO3[1:0] GPIO2[1:0] R/W R/W Function Rev. 1.1 Si2401/Si3008 GPD5 GPIO5 R/W R GPIO1[1:0] R/W 49 ...

Page 50

... Si2401/Si3008 SE3 (GPD). GPIO Data Bit D7 D6 Name Type Reset settings = 0000_0000 (0x00) Bit Name 7:4 Reserved Read returns zero. 3 GPD4 GPIO4 Data. Data = 0 Data = 1 2 GPD3 GPIO3 Data. Data = 0 Data = 1 1 GPD2 GPIO2 Data. Data = 0 Data = 1 0 GPD1 GPIO1 Data. ...

Page 51

... V.23 forward channel mark 1300 Hz (V23E = 1) V.23 backward channel mark 390 Hz (V23E = 1) User defined frequency 1 (USEN1 = 1) User defined frequency 2 (USEN1 = 1) Call progress filter A detected User defined frequency 3 (USEN2 = 1) User defined frequency 4 (USEN2 = 1) Call progress filter B detected Rev. 1.1 Si2401/Si3008 TONE[4:0] R Priority 1 2 ...

Page 52

... Si2401/Si3008 SE5 (DSP2). (SE8 = 0x02) Write Only Definition Bit D7 D6 Name Type Reset settings = 0000_0000 (0x00) Bit Name 7 Reserved Always write this bit to zero. 6:3 DTM[3:0] Tone Type Generated. DTMF tone (0–15) to transmit when selected by TONC = 001. See Table 17 on page 26. ...

Page 53

... Enable the reporting of V.23 tones, 390 Hz and 1300 Hz. 1 ANSE Answering Tone Reporting Enable Disable Enable the reporting of answer tones. 0 DTMFE DTMF Tone Reporting Enable Disable Enable the reporting of DTMF tones USEN2 USEN1 W W Function Rev. 1.1 Si2401/Si3008 V23E ANSE DTMFE ...

Page 54

... Si2401/Si3008 SEB (TPD). Timer and Powerdown Bit D7 D6 Name Type Reset settings = 0000_0000 (0x00) Bit Name 7:4 Reserved Read returns zero. 3 PDDE Powerdown DSP Engine Power on Powerdown. 2:0 Reserved Read returns zero PDDE R/W Function Rev. 1 ...

Page 55

... Reserved This bit must always be written to zero RDLY[2:0] R/W Function Delay 0 ms 256 ms 512 ms 1792 ms Ring Confirmation Count Time 100 s m 150 s m 200 s m 256 s m 384 s m 512 s m 640 s m 1024 s m Rev. 1.1 Si2401/Si3008 RCC[2:0] R/W 55 ...

Page 56

... Si2401/Si3008 SED (RVC2). Ring Validation Control 2 Bit D7 D6 Name Type Reset settings = 0001_1001 (0x19) Bit Name 7:6 Reserved Read returns zero. 5:0 RAS[5:0] Ring Assertion Time. These bits set the minimum ring frequency for a valid ring signal. During ring qualification, a timer is loaded with the RAS[5:0] field upon a TIP/RING event and decrements at a reg- ular rate ...

Page 57

... At 20 Hz, TIP/RING events would occur every 1/( Hz ms. To calculate the cor- rect RMX[3:0] value for a frequency range [f_min, f_max], the following equation should be used: RMX[3: RAS[5:0] – – (1/(2 x f_max)). R/W Function Ring Timeout 128 s m 256 s m 1920 s m Rev. 1.1 Si2401/Si3008 RMX[3:0] R/W 57 ...

Page 58

... Reserved Read returns zero. 1:0 LM[1:0] Line Mode. These bits determine the line status of the Si2401 On-hook 01 = Off-hook 10 = On-hook line monitor mode 11 = Reserved *Note: Under normal operation, the Si2401 internal microcontroller automatically sets these bits appropriately Function Rev. 1 LM[1:0] R/W ...

Page 59

... Reserved Read returns zero. 6 PDN Powerdown Normal operation Powers down the Si2401. 5 PDL Powerdown Line-Side Chip (typically only used for board level debug Normal operation. Program the clock generator before clearing this bit Places the line-side device in lower power mode. 4 LVFD Line Voltage Force Disable ...

Page 60

... Si2401/Si3008 SF2 (DAA2). DAA Low Level Functions 2 Bit D7 D6 Name Type Reset settings = 0000_0000 (0x00) Bit Name 7:4 Reserved Read only. 3 FDT Frame Detect (Typically only used for board-level debug Indicates isolation capacitor frame lock has been established Indicates isolation capacitor frame lock has not been established. ...

Page 61

... V SF8 (DAA8). DAA Low Level Functions 8 Bit D7 D6 Name LRV[3:0] Type Reset settings vary with line-side revision Bit Name 7:4 LRV[3:0] Line-Side Device Revision Number. 1001 = Si3008 Rev B 3:0 Reserved Do not modify Function RMS RMS Function Rev. 1.1 Si2401/Si3008 R ...

Page 62

... Si2401/Si3008 SF9 (DAA9). DAA Low Level Functions 9 Read Only Bit D7 D6 Name Type Reset settings = 0010_0000 (0x20) Bit Name 7:3 Reserved Do not modify. 2 OVL Receive overload. Same as ROV, except not sticky. 1 ROV Receive Overload (sticky excessive level detected Excessive input level detected. ...

Page 63

... Transmit Data. Serial communication data to the Si2401. 7 CTS Clear to Send. Clear to send output used by the Si2401 to signal that the device is ready to receive more digital data on the TXD pin. 8 RESET Reset Input. An active low input that is used to reset all control registers to a defined, initialized state ...

Page 64

... Si2401/Si3008 Pin # Pin Name 11 GPIO4/INT/ General Purpose Input/INT. AOUT This pin can be either a GPIO pin (digital in, digital out) or the INT pin. Default is digital in. When programmed as INT, this pin provides five functions. While the modem is connected, it asserts if the carrier is lost, a wake-on ring (using the “ATZ” command) event is detected, a loss of loop current event is detected, V ...

Page 65

... Pin Descriptions: Si3008 Pin # Pin Name 1 C1B Isolation Capacitor 1B. Connects to one side of isolation capacitor C1 and communicates with the Si2401. 2 C2B Isolation Capacitor 2B. Connects to one side of isolation capacitor C2 and communicates with the Si2401. 3 VREG Voltage regulator. Connects to an external capacitor to provide bypassing for an internal power supply. ...

Page 66

... Si2401/Si3008 10. Ordering Guide Chipset Description Si2401 Commercial lead-free 66 Power Supply Digital 3.3 V Si2401-FS Rev. 1.1 Line Temperature Si3008-B- °C ...

Page 67

... Millimeters Symbol Min Max A 1.35 1.75 A1 .10 .25 B .33 .51 C .19 .25 D 9.80 10.00 E 3.80 4.00 e 1.27 BSC H 5.80 6.20 h .25 .50 L .40 1.27 γ 0.10 θ 0º aaa 0.25 bbb 0.25 Rev. 1.1 Si2401/Si3008 h L Detail F C See Detail F 8º 67 ...

Page 68

... Si2401/Si3008 12. Package Outline: 8-Pin Exposed Pad SOIC Figure 7 illustrates the package details for the Si3008. Table 24 lists the values for the dimensions shown in the illustration. Figure 7. 8-pin Exposed Pad Small Outline Integrated Circuit (SOIC) Package 68 α Rev. 1.1 ...

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... Notes: 1. All dimensions shown are in millimeters (mm). 2. Dimensioning and tolerancing per ANSI Y14.5M-1994. 3. Recommended card reflow profile is per the JEDEC/IPC J-STD- 020C specification for Small Body Components. Rev. 1.1 Si2401/Si3008 Millimeters Max 1.75 0.15 1.55 REF 0.51 0.25 5.00 2 ...

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... Si2401/Si3008 OCUMENT HANGE IST Revision 0.5 to Revision 1.0 Updated Table 2, “Loop Characteristics,” on page 4. Updated Table 4, “AC Characteristics,” on page 6. Updated Table 7, “Country-Specific PTT Specifications,” on page 11. Updated "12. Package Outline: 8-Pin Exposed Pad SOIC" on page 68. Revision 1.0 to Revision 1.1 Updated Table 7, “Country-Specific PTT Specifications,” ...

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... N : OTES Si2401/Si3008 Rev. 1.1 71 ...

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... Si2401/Si3008 C I ONTACT NFORMATION Silicon Laboratories Inc. 4635 Boston Lane Austin, TX 78735 Tel: 1+(512) 416-8500 Fax: 1+(512) 416-9669 Toll Free: 1+(877) 444-3032 Email: ISOinfo@silabs.com Internet: www.silabs.com The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. ...

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