PI7C9X7954AFDE Pericom Semiconductor, PI7C9X7954AFDE Datasheet - Page 17

• Manufacturer Part Number: PI7C9X7954AFDE
• Description: IC PCIE-TO-UART BRIDGE 128LQFP
• Manufacturer: Pericom Semiconductor

Specifications of PI7C9X7954AFDE

• Applications: PCIe-to-Uart Bridge
• Interface: Advanced Configuration Power Interface (ACPI)
• Voltage - Supply: 1.8V, 3.3V
• Package / Case: 128-LQFP
• Mounting Type: Surface Mount
• Transmitter And Receiver Fifo Counter: Yes
• Package Type: LQFP
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

5. FUNCTIONAL DESCRIPTION
The PI7C9X7954 is an integrated solution of four high-performance 16C550 UARTs with one x1 PCI
Express host interface. The PCI Express host interface is compliant with the PCI Express Base
Specification 1.1, PCI Express CEM Specification 1.1, and PCI Power Management 1.2. In addition, the
chip is compliant with the Advanced Configuration Power Interface (ACPI) Specification and the PCI
Standard Hot-Plug Controller (SHPC) and Subsystem Specification Revision 1.0. The x1 PCI Express host
interface supports up to 2.5 Gbps bandwidth and complete PCI Express configuration register set. The PCI
Express interface allows direct access to the configuration and status registers of the UART channels.
The UARTs in the PI7C9X7954 support the complete register set of the 16C550-type devices. The UARTs
support Baud Rates up to 15 Mbps in asynchronous mode. Each UART channel has 128-byte deep transmit
and receive FIFOs. The high-speed FIFOs reduce CPU utilization and improve data throughput. In addition,
the UARTs support enhanced features including automated in-band flow control using programmable Xon/
Xoff in both directions, automated out-band flow control using CTS#/ RTS# and/or DRS#/ DTR#, and
arbitrary transmit and receive trigger levels.
5.1. CONFIGURATION SPACE
The PI7C9X7954 has two sets of registers to allow various configuration and status monitoring functions.
The PCI Express Configuration Space Registers enable the plug-and-play and auto-configuration when the
device is connected to the PCI Express system bus. The UART configuration and internal registers enable
the general UART operation functions, status control and monitoring.
5.1.1.
The PI7C9X7954 is recognized as a PCI Express endpoint, which is mapped into the configuration space as
a single logical device. Each endpoint in the system, including the PI7C9X7954, is part of a Hierarchy
Domains originated by the Root Complex, which is a tree with a Root Port at its head in the configuration
space. The device configuration registers are implemented for the user to access the functionalities provided
by the PCI Express specification. The specification utilizes a flat memory-mapped configuration space to
access device configuration registers.
All PCI Express endpoints facilitate a PCI-compatible configuration space to maintain compatibility with
PCI software configuration mechanism. PCI Local Bus Specification, Revision 3.0 allocates 256 bytes per
device function. PCI Express Base Specification 1.1 extends the configuration space to 4096 bytes to allow
enhanced features. The first 256 bytes of the PCI Express Configuration Space are PCI 3.0 compatible
region, and the rest of the 4096 bytes are PCI Express Configuration Space. The user can access the PCI 3.0
compatible region either by conventional PCI 3.0 configuration addresses or by the PCI Express
memory-mapping addresses. These two types of accesses to the PCI 3.0 compatible region have identical
results. The enhanced features in the PCI Express configuration space can only be accessed by PCI Express
memory-mapping accesses.
5.1.2.
Through the UART registers, the user can control and monitor various functionalities of the UARTs on the
PI7C9X7954 including FIFOs, interrupt status, line status, modem status and sample clock. Each of the
UART’s transmit and receive data FIFOs can be conveniently accessed by reading and writing the registers
in the UART configuration space. These registers allow flexible programming capability and versatile
device operations of the PI7C9X7954. Each UART is accessed through an 8-byte I/O blocks. The addresses
September 2009 – Revision 1.3
Pericom Semiconductor
PCI Express Configuration Space
UART Configuration Space
09-0088
Page 17 of 70
PCI Express® Quad UART
PI7C9X7954
Datasheet