PCA9701D,118 NXP Semiconductors, PCA9701D,118 Datasheet
PCA9701D,118
Specifications of PCA9701D,118
935283617118
PCA9701D-T
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PCA9701D,118 Summary of contents
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PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT Rev. 05 — 11 November 2009 1. General description The PCA9701/PCA9702 are low power 18 V tolerant SPI General Purpose Input (GPI) shift register designed to monitor the status of ...
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... NXP Semiconductors I Operating temperature range +125 C I PCA9701 offered in SO24, TSSOP24 and HWQFN24 packages I PCA9702 offered in TSSOP16 package 3. Applications I Body control modules I Switch monitoring I Industrial equipment I Cellular telephones I Emergency lighting I SBC wake pin extension 4. Ordering information Table 1. Ordering information Type number ...
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... NXP Semiconductors 5. Block diagram IN0 IN1 (1) INn ( for PCA9701 for PCA9702 Fig 1. Block diagram of PCA9701; PCA9702 PCA9701_PCA9702_5 Product data sheet V DD PCA9701/PCA9702 DFF0 DFF1 (1) DFFn INPUT STATUS REGISTER V Rev. 05 — 11 November 2009 PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning 1 SDOUT INT 2 INT_EN 3 4 IN0 5 IN1 IN2 6 PCA9701D IN3 7 8 IN4 IN5 9 IN6 10 IN7 002aac636 Fig 2. Pin configuration for SO24 terminal 1 index area IN0 1 IN1 2 3 IN2 PCA9701HF IN3 4 IN4 5 6 IN5 Transparent top view Fig 4. Pin confi ...
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... NXP Semiconductors 6.2 Pin description Table 2. Pin description Symbol Pin SO24, TSSOP24 SDOUT 1 INT 2 INT_EN 3 IN0 4 IN1 5 IN2 6 IN3 7 IN4 8 IN5 9 IN6 10 IN7 IN8 13 IN9 14 IN10 15 IN11 16 IN12 17 IN13 18 IN14 19 IN15 SCLK 22 SDIN [1] HWQFN24 package die supply ground is connected to both V ground for proper device operation. For enhanced thermal, electrical, and board level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the PCB in the thermal pad region ...
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... NXP Semiconductors 7. Functional description PCA9701 is a 16-bit General Purpose Input (GPI) with an open-drain interrupt output designed to monitor switch status. By putting an external 100 k series resistor at the input port, the device allows the input to tolerate momentary double 12 V battery, reverse battery jump start load dump conditions. The interrupt output is asserted when an input port status changes ...
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... NXP Semiconductors 7.1.5 Register access timing Figure 6 LOW. On the falling edge of CS, input port status, DATA[n:0] is captured into the input status register, and subsequently the first rising edge of SCLK parallel loads the shift register. The falling edge of SCLK samples the data on the SDIN. The MSB from the shift register is valid and available on the SDOUT after the fi ...
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... NXP Semiconductors Table HIGH LOW don’t care INT_EN [1] Input status register is the value or content of the D flip-flops. [2] Logic states shown for INT pin assumes 10 k pull-up resistor. 7.3 General Purpose Inputs The General Purpose Inputs (GPI) are designed to behave like a typical input in the ...
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... NXP Semiconductors 7.3 minimum LOW threshold of 2 guaranteed for the logical switching points for the inputs. See 0.7V DD 0.4V DD Fig 7. The V IL that if the user applies 2 less to the input (with V passes this threshold, they will always see a LOW. The more to the input (with V always see a HIGH ...
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... NXP Semiconductors 8. Application design-in information 8.1 General application ( for PCA9701 for PCA9702 Fig 8. 8.2 Automotive application Supports: • battery ( • Double battery ( • Reverse battery ( • Jump start (27 V for 60 seconds) • Load dump (40 V) PCA9701_PCA9702_5 Product data sheet 2 5 1.5 k ...
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... NXP Semiconductors 8.2.1 SBC wake port extension with cyclic biasing System Basis Chips (SBC) offer many functions needed for in-vehicle networking solutions. Some of the features built into SBC are: • Transceivers (HS-CAN, LIN 2.0) • Scalable voltage regulators • Watchdog timers; wake-up function • ...
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... NXP Semiconductors 8.2.1.2 UJA106x with PCA9701, sleep Fig 10. UJA106x with PCA9701 with unsupplied C (sleep) • Very low quiescent system current (50 A) due to disabled C and cyclically biasing of switches • Wake-up upon change of switches or upon bus traffic (CAN and LIN) • PCA970x supplied out of cyclically biased transistor regulator ...
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... NXP Semiconductors 8.2.1.3 UJA107x with PCA9701, standby Fig 11. UJA107x with PCA9701 with supplied C (standby) • UJA107x SBC provides WBIAS pin for cyclic biasing of the inputs • Compatible with UJA107x based ASSPs 8.2.2 Application examples including switches to battery IN0 IN1 clamp 15 IN15 Fig 12 ...
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... NXP Semiconductors 9. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134 +125 C, unless otherwise specified. amb Symbol Parameter V supply voltage DD I input current I V input voltage I T storage temperature stg T maximum junction temperature j(max) [1] With GPI external series resistors, the inputs support double battery, reverse battery and load dump conditions. During double battery or load dump the input pin will drain slightly higher leakage current until the input drops For more detail of leakage current specifi ...
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... NXP Semiconductors 10. Static characteristics Table 5. Static characteristics Symbol Parameter Supply V supply voltage DD I supply current DD V power-on reset voltage POR General Purpose Inputs V LOW-level input voltage IL V HIGH-level input voltage IH I input current I I HIGH-level input current IH I input leakage current ...
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... NXP Semiconductors 11. Dynamic characteristics Table 6. Dynamic characteristics amb Symbol Parameter f maximum input clock frequency max t rise time r t fall time f t pulse width HIGH WH t pulse width LOW WL t SPI enable lead time SPILEAD t SPI enable lag time SPILAG t SDIN set-up time ...
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... NXP Semiconductors Fig 15. AC waveform for t Fig 16. AC waveform for INT timing PCA9701_PCA9702_5 Product data sheet POR CS SCLK SDOUT MSB out t POR timing POR CS INn STATE 0 INT_EN t v(INT_N) INT Rev. 05 — 11 November 2009 PCA9701; PCA9702 18 V tolerant SPI 16-bit/8-bit GPI with INT 2 ...
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... NXP Semiconductors 12. Test information Fig 17. Test circuitry for enable/disable times, SDOUT (t Fig 18. Test circuitry for switching times, SDOUT (t Fig 19. Test circuitry for switching times, INT R = load resistance load capacitance includes jig and probe capacitance termination resistance should be equal to the output impedance Z T generators ...
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... NXP Semiconductors 13. Package outline SO24: plastic small outline package; 24 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 2.65 mm 0.25 0.1 2.25 0.012 0.096 0.1 inches 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors HWQFN24: plastic thermal enhanced very very thin quad flat package; no leads; 24 terminals; body 0.75 mm terminal 1 index area terminal 1 24 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max 0.05 0.30 mm 0.8 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 14. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 14.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 14.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors Fig 24. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 15. Abbreviations Table 9. Acronym ASSP CAN CDM DUT ECU ESD GPI HBM HS-CAN LIN LSB ...
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... NXP Semiconductors 16. Revision history Table 10. Revision history Document ID Release date PCA9701_PCA9702_5 20091111 • Modifications: Table 5 “Static – I – I – I – I PCA9701_PCA9702_4 20090716 PCA9701_PCA9702_3 20081203 PCA9701_PCA9702_2 20070829 PCA9701_PCA9702_1 20070323 PCA9701_PCA9702_5 Product data sheet Data sheet status Product data sheet characteristics”, sub-section “SPI and control”: for condition V = 4.5 V: Min value changed from “ ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 Functional description . . . . . . . . . . . . . . . . . . . 6 7.1 SPI bus operation . . . . . . . . . . . . . . . . . . . . . . . 6 7.1 chip select 7.1.2 SCLK - serial clock input 7.1.3 SDIN - serial data input . . . . . . . . . . . . . . . . . . 6 7 ...