W83977G-A Nuvoton Technology Corporation of America, W83977G-A Datasheet - Page 96
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W83977G-A
Manufacturer Part Number
W83977G-A
Description
IC I/O CONTROLLER 128-PQFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheet
1.W83977G-A.pdf
(182 pages)
Specifications of W83977G-A
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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8.3.2
Modes 000 (SPP) and 001 (PS/2) (Data Port)
During a write operation, the Data Register latches the contents of the data bus on the rising edge of
the input. The contents of this register are output to the PD0-PD7 ports. During a read operation, ports
PD0-PD7 are read and output to the host. The bit definitions are as follows:
Mode 011 (ECP FIFO-Address/RLE)
A data byte written to this address is placed in the FIFO and tagged as an ECP Address/RLE. The
hardware at the ECP port transmits this byte to the peripheral automatically. The operation of this
register is defined only for the forward direction. The bit definitions are as follows:
8.3.3
These bits are at low level during a read of the Printer Status Register. The bits of this status register
are defined as follows:
W83977F-A/ W83977G-A/ W83977AF-A/ W83977AG-A
Data and ecpAFifo Port
Device Status Register (DSR)
7
6
7
7
5
6
6
4
5
5
3
4
4
2
3
3
-88
1
2
2
1
0
1
1
1
0
0
1
Address/RLE
Address or RLE
nFault
Select
PError
nAck
nBusy
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
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