W83977G-A Nuvoton Technology Corporation of America, W83977G-A Datasheet - Page 97
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W83977G-A
Manufacturer Part Number
W83977G-A
Description
IC I/O CONTROLLER 128-PQFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheet
1.W83977G-A.pdf
(182 pages)
Specifications of W83977G-A
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Bit 7: This bit reflects the complement of the Busy input.
Bit 6: This bit reflects the nAck input.
Bit 5: This bit reflects the PError input.
Bit 4: This bit reflects the Select input.
Bit 3: This bit reflects the nFault input.
Bit 2-0: These three bits are not implemented and are always logic one during a read.
8.3.4
The bit definitions are as follows:
Bit 6, 7: These two bits are logic one during a read and cannot be written.
Bit 5: This bit has no effect and the direction is always out if mode = 000 or mode = 010. Direction is
Bit 4: Interrupt request enable. When this bit is set to a high level, it may be used to enable interrupt
Bit 3: This bit is inverted and output to the SLIN output.
Bit 2: This bit is output to the INIT output.
Bit 1: This bit is inverted and output to the AFD output.
Bit 0: This bit is inverted and output to the STB output.
8.3.5
This mode is defined only for the forward direction. The standard parallel port protocol is used by a
hardware handshake to the peripheral to transmit bytes written or DMAed from the system to this
FIFO. Transfers to the FIFO are byte aligned.
W83977F-A/ W83977G-A/ W83977AF-A/ W83977AG-A
valid in all other modes.
requests from the parallel port to the CPU due to a low to high transition on the ACK input.
Device Control Register (DCR)
cFifo (Parallel Port Data FIFO) Mode = 010
0
1
0
1
7
1
the parallel port is in output mode.
the parallel port is in input mode.
The printer is not selected.
The printer is selected.
6
1
5
4
-89 -
3
2
1
0
strobe
autofd
nInit
SelectIn
ackIntEn
Direction
Publication Release Date: May 2006
Revision 0.60
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