RC28F128J3D75B Numonyx - A DIVISION OF MICRON SEMICONDUCTOR PRODUCTS, INC., RC28F128J3D75B Datasheet - Page 33

• Manufacturer Part Number: RC28F128J3D75B
• Description: IC FLASH 128MBIT 75NS 64EZBGA
• Manufacturer: Numonyx - A DIVISION OF MICRON SEMICONDUCTOR PRODUCTS, INC.
• Series: -r

Specifications of RC28F128J3D75B

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 128M (16Mx8, 8Mx16)
• Speed: 75ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-EZBGA
• Lead Free Status / Rohs Status: Contains lead / RoHS non-compliant
• Other names: 872763; 872763TR; 872763TR; RC28F128J3D75 872763; RC28F128J3D75B; RC28F128J3D75BTR

Numonyx™ Embedded Flash Memory (J3 v D, Monolithic)
Note:
Table 17: Enhanced Configuration Register
Table 18: Asynchronous 8-Word Page Mode Command Bus-Cycle Definition
8.1.2
8.2
December 2007
316577-06
Set Enhanced Configuration
Register (Set ECR)
ECR
ECR[15:14]
15
ECR[12:0]
1.. ECD = Enhanced Configuration Register Data
Reserved
ECR[13]
BITS
ECR
Command
14
RFU
RFU
For forward compatibility reasons, if the 8-word Asynchronous Page mode is used on
Numonyx™ Embedded Flash Memory (J3 v D, Monolithic) , a Clear Status Register
command must be executed after issuing the Set ECR command. See
further details.
Length
Output Disable
With CEx asserted, and OE# at a logic-high level (V
Output signals D[15:0] are placed in a high-impedance state.
Bus Writes
Writing or Programming to the device, is where the host writes information or data into
the flash device for non-volatile storage. When the flash device is programmed, ‘ones’
are changed to ‘zeros’. ‘Zeros’ cannot be programed back to ‘ones’. To do so, an erase
operation must be performed. Writing commands to the Command User Interface (CUI)
enables various modes of operation, including the following:
Erasing is performed on a block basis – all flash cells within a block are erased together.
Any information or data previously stored in the block will be lost. Erasing is typically
done prior to programming. The Block Erase command requires appropriate command
data and an address within the block to be erased. The Byte/Word Program command
requires the command and address of the location to be written. Set Block Lock-Bit
commands require the command and block within the device to be locked. The Clear
Block Lock-Bits command requires the command and address within the device to be
cleared.
• “1” = 8 Word Page mode
• “0” = 4 Word Page mode
Page
ECR
• Reading of array data
• Common Flash Interface (CFI) data
• Identifier codes, inspection, and clearing of the Status Register
• Block Erasure, Program, and Lock-bit Configuration (when V
13
ECR
12
Required
Cycles
Bus
2
ECR
11
DESCRIPTION
ECR
10
Oper
Write
ECR
9
First Bus Cycle
Addr
ECR
8
ECD
(1)
ECR
7
Reserved
0060h
ECR
Data
6
IH
All bits should be set to 0.
All bits should be set to 0.
ECR
), the device outputs are disabled.
5
Oper
Write
ECR
4
Second Bus Cycle
PEN
ECR
3
NOTES
Addr
= V
ECD
Table 18
ECR
(1)
2
PENH
)
ECR
1
0004h
for
Datasheet
Data
ECR
0
33