A5974ADTR STMicroelectronics, A5974ADTR Datasheet - Page 21
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A5974ADTR
Manufacturer Part Number
A5974ADTR
Description
IC REG SW STEP-DOWN 2A 8SOIC
Manufacturer
STMicroelectronics
Series
-r
Type
Step-Down (Buck), PWMr
Datasheet
1.A5974ADTR.pdf
(49 pages)
Specifications of A5974ADTR
Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
1.235 V ~ 35 V
Current - Output
2A
Frequency - Switching
500kHz
Voltage - Input
4 V ~ 36 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (0.154", 3.90mm Width) Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11423-2
A5974AD
7.2
whereas the zero is defined as:
Equation 5
F
the frequency of the double pole of the LC filter (see below). F
frequency.
LC filter
The transfer function of the LC filter is given by:
Equation 6
where R
If R
Equation 7
The zero of this transfer function is given by:
Equation 8
F
increase the phase margin of the loop.
The poles of the transfer function can be calculated through the following expression:
Equation 9
In the denominator of A
Equation 10
If the damping coefficient δ is very close to zero, the roots of the equation become a double
root whose value is ω
Similarly for A
Equation 11
P1
0
is the zero introduced by the ESR of the output capacitor and it is very important to
LOAD
is the low frequency which sets the bandwidth, while the zero F
LOAD
>>ESR, the previous expression of A
A
LC
s ( )
is defined as the ratio between V
LC
=
the poles can usually be defined as a double pole whose value is:
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- -
s
2
F PLC1 2
⋅
n
L C
.
⋅
LC
,
A
OUT
the typical second order system equation can be recognized:
LC
=
s ( )
Doc ID 018762 Rev 1
–
--------------------------------------------------------------------------------------------------------------------------------------------- -
⋅
ESR C OUT
(
ESR
=
F
F
s
O
F
---------------------------------------------------------------------------------------- -
L C
⋅
2
PLC
Z1
=
⋅
+
+
R
R
2 δ ω
LOAD
----------------------------------------------- -
2 π ESR C
OUT
=
=
LOAD
⋅ ⋅
⋅ ⋅
---------------------------------
2 π R
1
------------------------------------------- -
2 π ⋅
±
⋅
⋅
+
⋅
s
(
)
(
ESR C
n
LC
ESR C OUT
2
2 L C OUT
1
⋅
+
•
1
⋅
OUT
1
+
⋅ ⋅
+
s
s
can be simplified and becomes:
c
ESR C
1
ESR C
⋅
+
L C
⋅
⋅
⋅
⋅
(
ω
⋅
C
ESR C
and I
OUT
2
c
OUT
n
OUT
⋅
⋅
⋅
OUT
OUT
)
OUT
⋅
2
s
–
OUT
.
(
⋅
4 L C OUT
⋅
s
s
P2
⋅ ⋅
⋅
+
)
R
1
is usually at a very high
LOAD
Z1
is usually put near to
+
)
L
)
Closing the loop
+
R
LOAD
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