DS33W11+ Maxim Integrated Products, DS33W11+ Datasheet - Page 21
![IC MAPPING ETHERNET 256CSBGA](/photos/6/50/65053/256-csbga_21-0315_sml.jpg)
DS33W11+
Manufacturer Part Number
DS33W11+
Description
IC MAPPING ETHERNET 256CSBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33X11.pdf
(375 pages)
Specifications of DS33W11+
Applications
Data Transport
Interface
Parallel/Serial
Voltage - Supply
1.8V, 2.5V, 3.3V
Package / Case
256-CSBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 21 of 375
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7.
7.1
Note that all digital pins are inout pins in JTAG mode. This feature increases the effectiveness of board level ATPG
patterns.
Table 7-1. Detailed Pin Descriptions
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
SPI_MISO
SPI_MOSI
SPI_CLK
NAME
A10
D0/
D1/
D2/
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
D3
D4
Pin Descriptions
Pin Functional Description
PACKAGE PINS
G10
G11
K10
K11
K13
K12
256
L10
L11
L12
L13
L9
K6
L6
K7
L7
K8
144
K4
J4
L4
—
—
—
—
—
—
—
—
—
—
—
—
—
TYPE
IOz
IOz
IOz
IOz
IOz
I
I
I
I
I
I
I
I
I
I
I
MICROPROCESSOR PORT
Address Bit 0. Address bit 0 of the microprocessor interface. Least
Significant Bit. Note that the parallel bus is not available in the 144 pin
DS33X11, and the SPI Slave port must be used for processor control.
Address Bit 1. Address bit 1 of the microprocessor interface.
Address Bit 2. Address bit 2 of the microprocessor interface.
Address Bit 3. Address bit 3 of the microprocessor interface.
Address Bit 4. Address bit 4 of the microprocessor interface.
Address Bit 5. Address bit 5 of the microprocessor interface.
Address Bit 6. Address bit 6 of the microprocessor interface.
Address Bit 7. Address bit 7 of the microprocessor interface.
Address Bit 8. Address bit 8 of the microprocessor interface.
Address Bit 9. Address bit 9 of the microprocessor interface.
Address Bit 10. Address bit 10 of the microprocessor interface.
Data Bit 0. Bi-directional data bit 0 of the microprocessor interface. Least
Significant Bit. Not driven when CS=1 or RST=0.
SPI_MISO (SPI_SEL=1). SPI Serial Data Output (Master-in Slave-Out).
Data Bit 1. Bi-directional data bit 1 of the microprocessor interface. Not
driven when CS=1 or RST=0.
SPI_MOSI (SPI_SEL=1). SPI Serial Data Input (Master-out Slave-in)
Data Bit 2. Bi-directional data bit 2 of the microprocessor interface. Not
driven when CS=1 or RST=0.
SPI_CLK (SPI_SEL=1). SPI Serial Clock Input.
Data Bit 3. Bi-directional data bit 3 of the microprocessor interface. Not
driven when CS=1 or RST=0.
Data Bit 4. Bi-directional data bit 4 of the microprocessor interface. Not
driven when CS=1 or RST=0.
FUNCTION
21 of 375
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