DS33W11+ Maxim Integrated Products, DS33W11+ Datasheet - Page 274
![IC MAPPING ETHERNET 256CSBGA](/photos/6/50/65053/256-csbga_21-0315_sml.jpg)
DS33W11+
Manufacturer Part Number
DS33W11+
Description
IC MAPPING ETHERNET 256CSBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS33X11.pdf
(375 pages)
Specifications of DS33W11+
Applications
Data Transport
Interface
Parallel/Serial
Voltage - Supply
1.8V, 2.5V, 3.3V
Package / Case
256-CSBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 274 of 375
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7C1h:
Default
10.8.6 Receive Voice Port Register Description
Register Name:
Register Description:
Register Address:
7C0h:
Default
Bit 9: Receive Voice FIFO Reset (RVFRST)
powered down, and all incoming data is discarded.
Bit 8: Receive Voice Clock Invert (RVCLKI)
Bits 3-7: Receive Voice Octets Per Frame (RVOPF[4:0]). Controls the number of octets that are used for voice
traffic per frame. Note: Max. number of octets allowed to be used for voice is 16.
Bit 2: RSYNC Control (RSYNCC). This setting is necessary only if voice ports are enabled. RVSYNC MUST be a
frame sync.
Bit 1: Port Configuration (PC). Used to divide down multiframe sync to frame sync.
Bit 0: Receive Port Enable (RPE)
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
0 = The Receive Voice FIFO resumes normal operations
1 = Receive Voice FIFO Reset. The FIFO is emptied, any transfer in progress is halted, the FIFO circuit is
0 = RVCLK is not inverted
1 = RVCLK is inverted
00001 = 1
00010 = 1
0 = RSYNC is a frame sync. Voice bytes inserted into Voice FIFO after every RSYNC.
1 = RSYNC is a multiframe sync. Voice bytes inserted into Voice FIFO based on PC register bit.
0 = Port is configured for T1.
1 = Port is configured for E1.
0 = Port is Disabled
1 = Port is Enabled
RVOPF4
Bit 15
Bit 7
0
0
-
st
st
byte after Frame sync is a voice channel.
two bytes after Frame sync are voice channels…
RVOPF3
Bit 14
Bit 6
0
0
-
LI.RVPCR
Serial Interface Receive Voice Port Control Register
7C0h
RVOPF2
Bit 13
Bit 5
0
0
-
RVOPF1
Bit 12
Bit 4
0
0
-
RVOPF0
Bit 11
Bit 3
0
0
-
RSYNCC
Bit 10
Bit 2
0
0
-
RVFRST
Bit 9
Bit 1
PC
0
0
RVCLKI
274 of 375
Bit 8
Bit 0
RPE
0
0
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