DS33X41+ Maxim Integrated Products, DS33X41+ Datasheet - Page 166

• Manufacturer Part Number: DS33X41+
• Description: IC MAPPING ETHERNET 256CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS33X41+

• Applications: Data Transport
• Interface: Parallel/Serial
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Package / Case: 256-CSBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

0A3h:
Default
Register Name:
Register Description:
Register Address:
0A2h:
Default
Bit 4: WAN Extract Header Trap High Byte (WEHTH). This value indicates whether the most significant byte of
the WEHT is to be used when performing the WAN Extract Header Trap
0 = Most significant byte is masked.
1 = Most significant byte is tested (not masked).
Bit 3: WAN Extract Header Trap Low Byte (WEHTL). This value indicates whether the least significant byte of
the WEHT is to be used when performing the WAN Extract Header Trap
0 = Least significant byte is masked.
1 = Least significant byte is tested (not masked).
Bits 0-2: WAN Header Extract Trap Position (WEHTP[3:1]) This value indicates the beginning byte position
within the WAN frame, for where the WAN Header Extract Trap is to be tested. Only binary values 0-6 are valid. A
value “0” indicates that the test is to begin on the first byte of the frame. The WAN Header Trap enables trapping
on SLARP, GFP PTI/UPI, GFP CID or Shim Tag.
Example SU.WEHTP Settings
GFP – PTI
Management
GFP Linear -CID
cHDLC SLARP
GFP Null
Extension with
Tag-1 (Shim;
MPLS-like)
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
Bit 15
Bit 7
0
0
-
-
tested
Bytes
Bit 14
1
1
2
2
Bit 6
0
0
-
-
SU.WEHTP
WAN Extract Header Trap Position
0A2h
WEHTH
Bit 13
Bit 5
1
1
1
1
0
0
-
-
WEHTL
WEHTH
Bit 12
Bit 4
0
0
1
1
0
0
-
WEHTP-3
WEHTL
Bit 11
Bit 3
0
1
0
1
0
0
-
WEHTP-2
WEHTP3
Bit 10
Bit 2
0
0
0
0
1
0
-
WEHTP-1
WEHTP2
Bit 9
Bit 1
0
0
-
0
0
0
0
WEHTP1
166 of 375
80 35h
WEHT
xx xxh
Bit 8
Bit 0
xxxxb
100x
xxh
0
0
-