DS33X41+ Maxim Integrated Products, DS33X41+ Datasheet - Page 219

• Manufacturer Part Number: DS33X41+
• Description: IC MAPPING ETHERNET 256CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS33X41+

• Applications: Data Transport
• Interface: Parallel/Serial
• Voltage - Supply: 1.8V, 2.5V, 3.3V
• Package / Case: 256-CSBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
18Dh:
Default
18Ch:
Default
Bit 10: WAN Extract Queue Pointer Reset.
Bits 9-0: WAN Extract Queue Start Address [10-1] This register specifies the Start Address for the WAN Extract
Queue. The value specifies the most significant 10 bits of the SDRAM absolute address, resulting in a granularity
of 32,768 bytes per LSB.
Register Name:
Register Description:
Register Address:
18Fh:
Default
18Eh:
Default
Bits 0-9: WAN Extract Queue End Address [10-1] This register specifies the End Address for the WAN Extract
Queue. The value specifies the most significant 10 bits of the SDRAM absolute address, resulting in a granularity
of 32,768 bytes per LSB.
Rev: 063008
________________________________________________ DS33X162/X161/X82/X81/X42/X41/X11/W41/W11
0 = No reset of the Queue Pointers (the user may be re-configuring to the same value)
1 = Momentary Reset of Queue Pointers (user is not required to change value to “0” to conclude reset)
WEQSA-8
WEQEA-8
Bit 15
Bit 15
Bit 7
Bit 7
0
0
0
0
-
-
WEQSA-7
WEQEA-7
Bit 14
Bit 14
Bit 6
Bit 6
0
0
0
0
-
-
AR.WEQSA
WAN Extract Queue Start Address
18Ch
AR.WEQEA
WAN Extract Queue End Address
18Eh
WEQSA-6
WEQEA-6
Bit 13
Bit 13
Bit 5
Bit 5
0
0
0
0
-
-
WEQSA-5
WEQEA-5
Bit 12
Bit 12
Bit 4
Bit 4
0
0
0
0
-
-
WEQSA-4
WEQEA-4
Bit 11
Bit 11
Bit 3
Bit 3
0
0
0
0
-
-
WEQSA-3
WEQEA-3
WEQPR
Bit 10
Bit 10
Bit 2
Bit 2
0
0
0
0
-
WEQSA-10
WEQEA-10
WEQSA-2
WEQEA-2
Bit 9
Bit 1
Bit 9
Bit 1
0
0
0
0
WEQSA-9
WEQSA-1
WEQEA-9
WEQEA-1
219 of 375
Bit 8
Bit 0
Bit 8
Bit 0
0
0
0
0