PX1011AI-EL1/G,551 NXP Semiconductors, PX1011AI-EL1/G,551 Datasheet

PCI-EXPRESS X1 PHY 81-LFBGA

PX1011AI-EL1/G,551

Manufacturer Part Number
PX1011AI-EL1/G,551
Description
PCI-EXPRESS X1 PHY 81-LFBGA
Manufacturer
NXP Semiconductors
Datasheets

Specifications of PX1011AI-EL1/G,551

Applications
PCI Express MAX to PCI Express PHY
Interface
IEEE 1149.1
Voltage - Supply
1.2 V
Package / Case
81-LFBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-3616
935282111551
PX1011AI-EL1/G-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PX1011AI-EL1/G,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
PCI Express PHY
This standalone PCI Express transceiver, available in a very small package, is optimized for use with
digital ASICs and low-cost FPGAs. It delivers superior performance, faster time-to-market, lower
risk, and increased design flexibility.
Key features
4 One x1 physical lane for PCI Express
4 Transmits and receives at 2.5 Gbps
4 Complies with PCI Express v1.0a and v1.1
4 P asses PCI Express v1.1 informational jitter tests from
4 Better than 1x10
4 NXP PXPIPE (8-bit, 250-MHz) PHY-MAC interface
4 Suitable for ExpressCard applications
4 L 0, L0s, L1 power management modes; partial support for
4 Support for spread-spectrum clocking
4 C ommercial-grade temperature range (PX1011A/PX1011B):
4 I ndustrial-grade temperature range (PX1011AI/PX1011BI):
4 Lead-free LFBGA-81 package (9 x 9 x 1.05 mm)
4 Comprehensive support tools
PCI-SIG
– FPGA-compatible SSTL2 Class 1 signaling
– < 300 mW power dissipation in L0 mode, including I/O
– Small, thin 81-pin package
L2, L3
0 to 70 °C
-40 to 85 °C
– Behavioral models for RTL simulation in various tools
– IBIS model for PCB signal integrity analysis
– Detailed PCB layout guidelines
– Multiple third-party design kits available
– Example PCB schematics available
– Boundary scan file available
-12
bit error rate (BER)
NXP x1 PHY single-lane
transceiver PX1011
Design benefits
4 Improves digital ASIC designs
4 Enables low-cost FPGA PCI Express designs
Fast, low-risk digital ASIC designs
The NXP x1 PHY single-lane transceiver PX1011 makes ASIC
development faster and less risky. By isolating the mixed-
signal PHY functions in an external transceiver, the PX1011
lets the ASIC’s digital functions migrate to the latest process
technologies without impacting complex PHY operations.
Increased efficiency of low-cost FPGA designs
The PX1011 also improves efficiency in designs that use an
FPGA. Low-cost, high-density FPGAs don’t typically offer an
on-chip PHY or SERDES. The PX1011 lets designers use an
FPGA to create inexpensive, flexible PCI Express applications
that have customer-specific functions coded into the FPGA.
The result is greater differentiation in a format that is easily
scalable to high-volume, consumer-oriented applications.
– Quickly add proven mixed-signal functionality and
– Reduce overall cost and risk
– Proven interoperability with multiple FPGAs
performance

Related parts for PX1011AI-EL1/G,551

PX1011AI-EL1/G,551 Summary of contents

Page 1

... L 0, L0s, L1 power management modes; partial support for L2 Support for spread-spectrum clocking 4 C ommercial-grade temperature range (PX1011A/PX1011B ° ndustrial-grade temperature range (PX1011AI/PX1011BI): - °C 4 Lead-free LFBGA-81 package ( 1.05 mm) 4 Comprehensive support tools – Behavioral models for RTL simulation in various tools – IBIS model for PCB signal integrity analysis – ...

Page 2

High-performance, low-power operation The PCI Express standard specifies a maximum transmitter peak-to-peak jitter of 120 ps. The PX1011 delivers excellent transmit jitter and receive performance, with a bit error rate of better than 1x10 . -12 The PX1011’s MAC interface ...

Page 3

... Elastic buffer 10 Serial to parallel Data recovery circuit CLK generator REFCLK I/O REFCLK_P REFCLK_N RX_P Ordering Information Type Number PX1011A-EL1/G PX1011A-EL1 PX1011AI-EL1/G PX1011B-EL1/G PX1011BI-EL1/G VDDD3 digital supply voltage 3 VDDA1 analog supply voltage 1 Min Typ Max 1.2 V 1.25 V 1.3 V 1.15 V 1.2 V 1.3 V ...

Page 4

NXP B.V. All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, ...

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