SI2438FT18-EVB Silicon Laboratories Inc, SI2438FT18-EVB Datasheet - Page 114

• Manufacturer Part Number: SI2438FT18-EVB
• Description: BOARD EVAL SI2438+SI3018 24PIN
• Manufacturer: Silicon Laboratories Inc

Specifications of SI2438FT18-EVB

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Si3050 + Si3011/18/19
114
Table 31. 24-Pin Quad Flat No-Lead (QFN) PCB Land Pattern Dimensions
Symbol
Notes:
General
Solder mask design
Stencil Design
Card Assembly
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification.
3. This Land Pattern Design is based on the IPC-7351 guidelines.
1. All metal pads are to be non-solder mask defined (NSMD). Clearance
1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls
2. The stencil thickness should be 0.125mm (5 mils).
3. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter
4. A 2 x 2 array of 0.90 mm square openings on 1.20 mm pitch should be used
1. A No-Clean, Type-3 solder paste is recommended.
2. The recommended card reflow profile is per the JEDEC/IPC J-STD-020
C1
C2
P1
P2
X1
Y1
between the solder mask and the metal pad is to be 60 mm minimum, all the
way around the pad.
should be used to assure good solder paste release.
pins.
for the center ground pad.
specification for Small Body Components.
E
2.10
2.10
0.20
0.75
MIN
Rev. 1.4
3.90
3.90
0.50
NOM
2.20
2.20
0.25
0.80
MAX
2.30
2.30
0.30
0.85