CY8CKIT-050 Cypress Semiconductor Corp, CY8CKIT-050 Datasheet - Page 57

• Manufacturer Part Number: CY8CKIT-050
• Description: DEV KIT PSOC 5 CY8C55
• Manufacturer: Cypress Semiconductor Corp
• Series: PSoC®5r
• Type: MCUr

Specifications of CY8CKIT-050

• Design Resources: PSoC 5 Dev Kit Schematic CY8CKIT-050 PCBA BOM CY8CKIT-50 Gerber File
• Contents: Board, Cable, CD, Display, Documentation
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: CY8C55
• Other names: 428-3110

9.3 Debug Features
The CY8C55 supports the following debug features:
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9.4 Trace Features
The following trace features are supported:
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9.5 SWV Interface
The SWV interface provides trace data to a debug host via the
Cypress MiniProg3 or an external trace port analyzer.
9.6 Programming Features
The SWD interface provides full programming support. The
entire device can be erased, programmed, and verified.
Designers can increase flash protection levels to protect
firmware IP. Flash protection can only be reset after a full device
erase. Individual flash blocks can be erased, programmed, and
verified, if block security settings permit.
9.7 Device Security
PSoC 5 offers an advanced security feature called device
security, which permanently disables all test, programming, and
debug ports, protecting your application from external access.
The device security is activated by programming a 32-bit key
(0x50536F43) to a Write Once Latch (WOL). The WOL must be
programmed at V
The WOL is a type of nonvolatile latch (NVL). The cell itself is an
NVL with additional logic wrapped around it. Each WOL device
contains four bytes (32 bits) of data. The wrapper outputs a ‘1’ if
a super-majority (28 of 32) of its bits match a pre-determined
pattern (0x50536F43); it outputs a ‘0’ if this majority is not
Document Number: 001-66235 Rev. *A
Halt and single-step the CPU
View and change CPU and peripheral registers, and RAM
addresses
Six program address breakpoints and two literal access
breakpoints
Data watchpoint events to CPU
Patch and remap instruction from flash to SRAM
Debugging at the full speed of the CPU
Compatible with PSoC Creator and MiniProg3 programmer and
debugger
Data watchpoint on access to data address, address range, or
data value
Software event monitoring, “printf-style” debugging
DDD
≤ 3.3 V.
PRELIMINARY
reached. When the output is 1, the Write Once NV latch locks the
part out of Debug and Test modes; it also permanently gates off
the ability to erase or alter the contents of the latch. Matching all
bits is intentionally not required, so that single (or few) bit failures
do not deassert the WOL output. The state of the NVL bits after
wafer processing is truly random with no tendency toward 1 or 0.
The WOL only locks the part after the correct 32-bit key
(0x50536F43) is loaded into the NVL's volatile memory,
programmed into the NVL's nonvolatile cells, and the part is
reset. The output of the WOL is only sampled on reset and used
to disable the access. This precaution prevents anyone from
reading, erasing, or altering the contents of the internal memory.
The user can write the key into the WOL to lock out external
access only if no flash protection is set (see
section on page 16). However, after setting the values in the
WOL, a user still has access to the part until it is reset. Therefore,
a user can write the key into the WOL, program the flash
protection data, and then reset the part to lock it.
If the device is protected with a WOL setting, Cypress cannot
perform failure analysis and, therefore, cannot accept RMAs
from customers. The WOL can be read out via SWD port to
electrically identify protected parts. The user can write the key in
WOL to lock out external access only if no flash protection is set.
For more information on how to take full advantage of the
security features in PSoC see the PSoC 5 TRM.
Disclaimer
Note the following details of the flash code protection features on
Cypress devices.
Cypress products meet the specifications contained in their
particular Cypress datasheets. Cypress believes that its family of
products is one of the most secure families of its kind on the
market today, regardless of how they are used. There may be
methods, unknown to Cypress, that can breach the code
protection features. Any of these methods, to our knowledge,
would be dishonest and possibly illegal. Neither Cypress nor any
other semiconductor manufacturer can guarantee the security of
their code. Code protection does not mean that we are
guaranteeing the product as “unbreakable.”
Cypress is willing to work with the customer who is concerned
about the integrity of their code. Code protection is constantly
evolving. We at Cypress are committed to continuously
improving the code protection features of our products.
PSoC
®
5: CY8C55 Family Datasheet
“Flash Security”
Page 57 of 114
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