CY8CKIT-020 Cypress Semiconductor Corp, CY8CKIT-020 Datasheet

KIT PSOC CY8C28 FAMILY PROCESSOR

CY8CKIT-020

Manufacturer Part Number
CY8CKIT-020
Description
KIT PSOC CY8C28 FAMILY PROCESSOR
Manufacturer
Cypress Semiconductor Corp
Series
PSoC®r
Type
MCUr
Datasheets

Specifications of CY8CKIT-020

Contents
Board, Software and Documentation
Silicon Manufacturer
Cypress
Core Architecture
PSoC
Features
Programmable System-on-chip Design Methodology And Architecture
Kit Contents
PSoC CY8C28 Module, Doc, CD
Silicon Core Number
CY8C28
Silicon Family Name
PSoC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
CY8C28 Family
Lead Free Status / Rohs Status
Supplier Unconfirmed
Other names
428-3036
CY8CKIT-020
®
PSoC
Development Kit Guide
Doc. # 001-56971 Rev. **
February 1, 2010
Cypress Semiconductor
198 Champion Court
San Jose, CA 95134-1709
Phone (USA): 800.858.1810
Phone (Intnl): 408.943.2600
http://www.cypress.com

Related parts for CY8CKIT-020

CY8CKIT-020 Summary of contents

Page 1

... PSoC Development Kit Guide CY8CKIT-020 Doc. # 001-56971 Rev. ** February 1, 2010 Cypress Semiconductor 198 Champion Court San Jose, CA 95134-1709 Phone (USA): 800.858.1810 Phone (Intnl): 408.943.2600 http://www.cypress.com ...

Page 2

... Code protection does not mean that we are guaranteeing the product as "unbreakable." Cypress is willing to work with the customer who is concerned about the integrity of their code. Code protection is constantly evolving Cypress are committed to continuously improving the code protection features of our products. 2 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 3

... Appendix A. Board Specifications and Layout 2.1 PSoC Development Board.........................................................................................51 2.1.1 Factory Default Configuration ........................................................................51 2.1.2 Power Supply Configuration Examples..........................................................52 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** 3.1.1.1 Creating My First PSoC 1 Project ....................................................13 3.1.1.2 main.c ..............................................................................................21 3.1.2.1 Creating ADC to LCD Project ..........................................................22 3.1.2.2 main.c ..............................................................................................27 3.1.3.1 Creating ADC to UART with DAC Project........................................29 3 ...

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... R31 - LCD Contrast Adjustment..................................................... 60 J12 - LCD Module Power ............................................................... 60 J2, J3, J4 and J5 - VDDIO Select................................................... 60 SW4 - Processor Reset Button ...................................................... External MHz Oscillator .......................................................... 61 P1, P2, P3 and P4 - Processor Module Receptacles..................... 61 Expansion Ports A and A'............................................................... 65 Expansion Port B............................................................................ 65 Expansion Port C ........................................................................... 65 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev ...

Page 5

... The kit gives several example projects with step-by-step instructions to enable you to easily get started developing PSoC solutions. To accompany the CY8CKIT-020 kit, you are required to have the CY8CKIT-001 PSoC Development Kit which provides you a common development platform where you can prototype and evaluate different solutions using any one of the PSoC 1, PSoC 3, or PSoC 5 architectures ...

Page 6

... In addition, three capacitive sensing elements (two buttons and a five segment slider) are included on the board to allow the evaluation of CapSense™ applications. The board has four GPIO expansion slots, allowing the I/O to expand to external boards. 6 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 7

... Source. Default Position: VREG (upper two pins) J7 VDD Digital, VDD Analog. Default Position: VDD (upper two pins, both headers) J12 - LCD Power. Default Position: ON (lower two pins) J2-J5 - VDDIO Power Select. Default Position: VDD (upper left two pins) CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Introduction 7 ...

Page 8

... Click the Debugger icon, and then click Next. Displays functionality unique to PSoC Designer, PSoC Creator, or the PSoC device. Displays cautions that are important to the subject. Origin of Description of Change Change AESA New Guide CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 9

... This section walks you through the high level design process for opening, building, program- ming, and running your first PSoC projects using this kit. To begin with be sure you have the CY8CKIT-001 and the CY8CKIT-020 kit. Follow each of these steps to make certain that your software and hardware environments are properly configured and ready for these projects: 1 ...

Page 10

... Figure 2-2. Build Project 2. PSoC Designer builds the project and displays comments in the Output window. When you see the message that the project built with 0 errors and 0 warnings you are ready to program the device. 10 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 11

... PWM and software. Now that the PSoC 1 device is programmed, reset the PSoC Development Board by pressing and releasing the reset switch (SW4). 2. LED1 blinks approximately once every second and LED2 blinks about three times a second. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Loading My First PSoC Project 11 ...

Page 12

... Loading My First PSoC Project Figure 2-4. Connect P1[6] to LED1 and P1[7] to LED2 3. For more details regarding this project, see the detailed step-by-step project instructions in First PSoC 1 Project on page 12 13. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** P1[6] P1[7] LED1 LED2 My ...

Page 13

... In the New Project window, select the Chip-Level Project. Name the project Ex1_LED_with_PWM Location, click Browse and navigate to the appropriate directory. Figure 3-1. New Project Window CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. **  New Project. The New Project window opens. 13 ...

Page 14

... In this window under Select Target Device, click View Catalog. 7. The Device Catalog window opens. Click on the PSoC tab, and scroll down to the CY8C28XXX section. 8. For this project click CY8C28645-24LTXI device in this section and then click Select. Figure 3-3. Device Catalog Window 14 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 15

... In the User Modules window, expand the PWMs folder. Figure 3-5. User Modules Window 12.In this folder right click on a PWM8 and select place. The User Module (UM) is placed in the first available digital block. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Sample Projects 15 ...

Page 16

... PWM with the settings as in the following figure. If the Properties window does not  appear, click View Figure 3-7. Properties Window 14.Next, route the PWM CompareOut signal to P1_7. The first step is to configure the Look Up Table (LUT) on Row_0_Output3. 16 Properties Window. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 17

... LUT, the Digital Interconnect window opens. 16.In this window enable Row_0_Output_3_Drive_3 to connect to GlobalOutOdd_7. Figure 3-9. Digital Interconnect Window 17.Click Close. 18.Click on GlobalOutOdd_7. A window appears, in this window configure PIN for Port_1_7. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Sample Projects 17 ...

Page 18

... LED_1 UM and navigate to the Properties window. Configure the LED for P1_6. Figure 3-12. Properties Window 22.Configure the Global Resources window to match the following figure. 18  Ex1_LED_with_PWM[CY8C28]   Loadable Configurations Ex1_LED_with_PWM - 2 User CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. **  ...

Page 19

... CY8C28_main_Ex1.c file, which can be found within the attach- ments feature of this PDF document. Figure 3-14. Workspace Explorer 24.Save the project. 25.Build the project. Build CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. **  Generate/Build 'Ex1_LED_with_PWM' Project. Sample Projects 19 ...

Page 20

... P1_7 to LED2 ❐ 29.Reapply power to the board. 30.Use PSoC Designer as described in gram the device. 31.Reset the DVK, and observe the blinking LEDs. 32.Save and close the project. 20 Programming My First PSoC 1 Project on page 11 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev pro- ...

Page 21

... Switch the state of Software LED (on or off) */ LED_1_Invert(); } /* End of while( End of main */ /* [] END OF FILE */ CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev Part specific constants and macros */ /* PSoC API definitions for all User Modules */ /* Variable used for delay */ /* Turn on the PWM to blink LED on P1.6 */ ...

Page 22

... Verify that the DelSigPlus_1 UM is placed in ASC10 the User Modules window expand the Amplifiers window. Right click PGA, select place. Ensure that the PGA is placed in ACC00. 22 3.1.1.1 on page 13, change the Name of the project to CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 23

... In the User Modules window expand Misc Digital, Right click LCD and click place. 7. Click PGA_1 and configure the properties to match this figure. Figure 3-17. PGA_1 Properties 8. Click DelSigPlus_1 and configure the properties to match this figure. Figure 3-18. DelSigPlus_1 Properties CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Sample Projects 23 ...

Page 24

... Figure 3-19. LCD_1 Properties 10.Configure the Global Resources to match the following figure. Figure 3-20. Global Resources 11. Ensure that AnalogColumn_InputMUX_0 is connected to Port_0_1 not configured for this port, double click the MUX and choose Port_0_1. 24 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 25

... Workspace Explorer. Replace the existing main.c content with the content of the embedded CY8C28_main_Ex2.c file, which can be found within the attachments feature of this PDF document. 14.Save the project. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Sample Projects 25 ...

Page 26

... ADC values may fluctuate several counts due to system noise, and if the potentiometer voltage is at the edge of an ADC count. 22.Save and close the project. 26  Generate/Build 'Ex2_ADC_to_LCD' Project. Programming My First PSoC 1 Project on page 11 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** RESET P0_1 VR R20 to pro- ...

Page 27

... This loop waits for a valid ADC result, and displays it on the LCD */ while ( there ADC data? */ if(DelSigPlus_1_fIsDataAvailable()) { /* Store result from ADC */ CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev part specific constants and macros */ /* PSoC API definitions for all User Modules */ */ */ /* Initialize the LCD */ /* Set the LCD to (Row=0,Column=0) */ ...

Page 28

... Sample Projects adcResult = DelSigPlus_1_wGetDataClearFlag(); LCD_1_Position(ROW_0, COLUMN_9); /* Set LCD to (Row=0,Column=9) */ LCD_1_PrHexInt(adcResult); /* Print ADC result on LCD */ } } /* End of while( End of main */ /* [] END OF FILE */ 28 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 29

... In the User Modules window expand Digital Comm, right click TX8, and click place the User Modules window expand DACs, right click DAC6, and click place. 10.Move the UMs so that they match the configuration shown in CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** 3.1.1.1 on page 13, change the Name of the project to ...

Page 30

... Sample Projects Figure 3-25. Configure User Modules 11. Click on DelSigPlus_1 and configure it to match this figure. Figure 3-26. DelSigPlus_1 Properties 30 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** TX8_1 Counter16_1 Counter16_1 PGA_1 DelSigPlus_1 DAC6_1 ...

Page 31

... DAC6_1 and configure it to match this figure. Figure 3-28. DAC6_1 Properties 14.Click LCD_1 and configure it to match this figure. Figure 3-29. LCD_1 Properties 15.Click on Counter16_1 and configure it to match this figure. Figure 3-30. Counter16_1 Properties CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Sample Projects 31 ...

Page 32

... Sample Projects 16.Click TX8_1 and configure it to match this figure. Figure 3-31. TX8_1 Properties 17.Click RO0[2] LUT, enable Row_0_Output_2_Drive_2 to connect GlobalOutOdd_2. Figure 3-32. Digital Interconnect Window 32 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 33

... Figure 3-33. Configure PIN for Port_1_2 19.Click OK to continue. 20.Click AnalogOutBuf_1 and configure it for Port_0_5. Figure 3-34. Configure AnalogOutBuf_1 21.Verify that AnalogColumn_InputMUX_0 is connected to Port_0_1 not configured for this port, double click the MUX and choose Port_0_1. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Sample Projects 33 ...

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... Sample Projects Figure 3-35. Verify AnalogColumn_InputMUX_0 Connection 34 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 35

... AnalogColumn_Clock_0 and AnalogColumn_Clock_1 are connected to VC2 not, double click the MUX and chose VC2. Figure 3-36. Verify AnalogColumn_Clock_0 Connection CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Sample Projects 35 ...

Page 36

... Note: An LED (P0_5 to LED1) by nature does not accurately show the changes in frequency the best way to see this is to use a Scope(P0_5 to Scope). 36  Generate/Build 'Ex3_ADC_to_UART_with_DAC'  Open File. Select All Files for Files of the  Build 'Ex3_ADC_to_UART_with_DAC' Project. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 37

... Note: The ADC output values may not reach full range due to potentiometer and ADC limitations. ADC values may fluctuate several counts due to system noise, and if the potentiometer voltage is at the edge of an ADC count. 40.Save and close the project. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Programming My First PSoC 1 Project on page 11 Sample Projects TX ...

Page 38

... WORD adcResult; Counter16_1_Start(); Counter16_1_EnableInt(); 38 /* part specific constants and macros */ /* PSoC API definitions for all User Modules */ */ */ 10, 12, 14, 17, 20, 23, 26, 29 Enable the counter used for DAC update rate */ /* Enable DAC update interrupt */ CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev there is ...

Page 39

... Parameters: * void * * Return: * void CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev Start the DAC */ /* Start reading values on the ADC */ /* Start the character LCD */ /* Set the LCD to (Row=0,Column= Enable Global Interrupts */ change the DAC update rate ADC data /* Print ADC result to LCD */ /* Write LCD result to TX8 -> ...

Page 40

... Sample Projects * *******************************************************************************/ void Counter16_C_ISR(void Check to see if we have reached the */ if (tablePos >= sizeof(sinTable)) { tablePos = 0; } DAC6_1_WriteBlind(sinTable[tablePos++]); } /* [] END OF FILE */ 40 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 41

... Figure 3-39. Select Multi User Module Window 3. Select Yes and click OK. 4. Right click the CSD user module in the workspace explorer and select CSD Wizard. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** 3.1.1.1 on page 13, change the Name of the project to Sample Projects ...

Page 42

... Sample Projects Figure 3-40. Select CSD Wizard 5. CapSense Wizard window opens. Figure 3-41. CapSense Wizard 6. In the CapSense Wizard window, under the Global Settings Tab, set the # of buttons Select P0.7 as the Modulator Capacitor Pin. 42 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 43

... Click and hold SW0 and drag it to P0. the same for SW1 and drag it to P0.6 Figure 3-43. CapSense Wizard Slider Sensors 10. Do the same thing for each slider sensor and corresponding pin. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Sample Projects 43 ...

Page 44

... User Modules window expand Misc Digital, right click LED, and click place. 16.In the User Modules window expand Misc Digital, right click LED, and click place. 17.Click CSD_1 and configure it to match this figure. 44 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 45

... Click LED_1 and configure it to match this figure. Figure 3-47. Figure . LED_1 Properties 20.Click LED_2 and configure it to match this figure. Figure 3-48. LED_2 Properties 21.Configure Global Resources to match the following figure. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Sample Projects 45 ...

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... LCD display. Likewise (P0[6]) is pushed it dis- plays "Button2" in the top row of the LCD display. The bottom row of the LCD displays the Slider position with a Horizontal Bar graph. 32.Save and close the project. 46  Generate/Build 'Ex4_CapSense' Project. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 47

... LCD with the current state Parameters: * void * * Return: * void * *******************************************************************************/ void main(void) { CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev part specific constants and macros */ /* PSoC API definitions for all User Modules */ /* LCD row LCD row LCD column 0 */ " " "Button1 " " ...

Page 48

... Updates the LCD screen with the current button state by displaying which * button is being touched on row 0. LED's are also updated according to button * state Parameters: * sensor_1: Button state for B1 * sensor_2: Button state for Return Slider Position */ CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 49

... Set both LED's off in this state */ LED_1_Off(); LED_2_Off(); } } /******************************************************************************* * Function Name: UpdateSliderPosition ******************************************************************************** * * Summary: * Updates the LCD screen with the current slider position by displaying the * horizontal bar graph Parameters: * value: Centroid position from CapSense slider Return: * void * CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Sample Projects 49 ...

Page 50

... The slider position is 0xFF if there is no finger present on the slider */ if (value > SLIDER_RESOLUTION Clear old slider position (2nd row of LCD) */ LCD_1_Position(ROW_1, COLUMN_0); LCD_1_PrCString(DEFAULT_ROW_1_STR); } else { /* Update the bar graph with the current finger position */ LCD_1_DrawBG(ROW_1, COLUMN_0, NUM_CHARACTERS, value + 1 END OF FILE */ 50 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 51

... VDDIO - This is power derived from either VDD or VADJ used to power digital I/O on the PSoC device. There are four sections of GPIO, which can be powered to 5V, 3.3V, or VADJ using four headers. It enables the user to power the PSoC GPIOs at different voltages. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev ...

Page 52

... SELECT VDD AS SOURCE FOR VDD ANLG SELECT VDD AS SOURCE FOR VDD DIG SELECT VREG AS SOURCE MOVE VDD SELECT SWITCH TO 3.3V SELECT VDD AS SOURCE FOR VDD ANLG SELECT VDD AS SOURCE FOR VDD DIG SELECT VREG AS SOURCE CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 53

... Place the jumper on J7 header to select VADJ as source for VDD DIG. Figure 2-4. Setting VDD DIG as VADJ and VDD ANLG as VDD for VDD = 3.3V This helps to separate the digital supply from the analog supply and VDD. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Board Specifications and Layout MOVE VDD SELECT SWITCH TO 3 ...

Page 54

... Place the jumper on J7 header to select VDD as source for VDD DIG. 54 MOVE VDD SELECT SWITCH TO 5V SELECT VDD AS SOURCE FOR VDD ANLG SELECT VDD AS SOURCE FOR VDD DIG SELECT VBUS AS SOURCE for more details. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 55

... USB 5V rail (VBUS). 2.1.2.10 VDD Select Switch This switch allows for selecting either 5V or 3.3V. VDD feeds VDD DIG, VDD ANLG and VDDIO. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Board Specifications and Layout MOVE VDD SELECT SWITCH TO 3.3V ...

Page 56

... VADJ voltage between 1.25V and 2.3V when the VDD select switch is in the 3.3V position. When the VDD select switch is in the 5V position, turning this variable resistor swings the VADJ voltage between 1.25V and 3.9V. 56 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 57

... RS232 transceiver to receptacle P16. These signals are Rx, Tx, Clear To Send, and Request To Send. To connect these signals to the PSoC I/O pins, use wires to jumper from P16 to P19, where sockets for ports zero and one are available. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** J10-RS232 POWER CAPSENSE SLIDER ...

Page 58

... Note: These I/O signals must not be greater than 3.3V. Table 2-2. Connector Pin Assignments - Wireless Radio Module Socket Pin Number P17 1 GND 2 V3_3 3 IRQ 4 RD_RESET 5 MOSI 6 nSS 7 SCK 8 MISO 9 GND 10 (Empty) 11 TxPA 12 RxPA 58 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 59

... If the LCD module is removed, the receptacle pins of P18 can be used as port 2. Table 2-3. Connector Pin Assignments - LCD Module Socket Pin Number 1 GND 2 VCC_LCD R/ CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** P18 Board Specifications and Layout 59 ...

Page 60

... VDDIO header, refer to the data sheet for the PSoC device used with this board. For example, VDDIO_0 is configured to VDD, VDDIO_1 is configured to 3.3V and VDDIO_2 is con- figured to VADJ by placing the jumpers in the respective positions as shown in Figure 2-9. VDDIO Select VDDIO_0=VDD(5V/3.3V) 60 P18 VDDIO_1=3.3V VDDIO_2=VADJ CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Figure 2-9. ...

Page 61

... VDDIO1 11 P5_6 12 P5_7 13 P5_4 14 P5_5 15 P12_6 16 P12_7 17 P1_6 18 P1_7 19 P1_4 20 P1_5 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev (North) P3 (East) P4 (South) GND GND GND GND GND P7_7 P6_1 P12_2 NC7 P6_0 P12_3 NC8 P6_3 P8_0 NC5 P6_2 P8_1 NC6 P15_5 ...

Page 62

... P9_5 P8_5 P3_1 P12_5 P8_6 P7_2 P12_4 P8_7 P7_3 P9_6 P4_2 (Empty) P9_7 P4_3 (Empty) P6_5 P4_4 P7_0 P6_4 P4_5 P7_1 P6_7 P4_6 NC1 P6_6 P4_7 NC2 GND GND GND GND P9_1 GND CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 63

... P1_7 2 P1_6 3 P1_5 4 P1_4 5 P1_3 6 P1_2 7 P1_1 8 P1_0 9 GND CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Board Specifications and Layout Port C Port A Port A‘ Port B P6 (PORT A') P7 (PORT A) P6_7 P3_7 P6_6 P3_6 P6_5 P3_5 P6_4 P3_4 P6_3 P3_3 P6_2 ...

Page 64

... P7_1 GND P7_0 V5_0 GND VIN RESRV5 GND P12_5 x P12_4 x P12_7 x P12_6 x GND x RESRV4 x CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev (PORT C) RESRV14 P8_7 P8_6 P8_5 P8_4 P8_3 P8_2 P8_1 P8_0 GND RESRV13 P7_7 P7_6 P7_5 P7_4 P7_3 P7_2 P7_1 ...

Page 65

... I/Os as well as ground and voltage pins. It can be used to join processor module I/Os port7, port8, and port9 with external I/Os through the use of daughter boards used for devices with a high I/O count. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Board Specifications and Layout 65 ...

Page 66

... Board Specifications and Layout 66 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 67

... The 5- and 10-pin connectors are NOT connected together on the I/O pins Notes: ** JTAG is supported only on the 10-pin connector *** Future upgrades may be possible to support these modes CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** JTAG ** SWD SWV Vtarg Vtarg Vtarg GND GND ...

Page 68

... B.5 Level Translation The design provides level translators that interfaces with any I/O voltage in the range of 1.2V to 5.5V without damage and function properly. There are actually two different level translators used in the design. 68 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 69

... Table C-1. Connectors / Communication Protocol Support Connector 5-pin Supported 10-pin N/A a. SWV trace is only available with SWD debugging. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** lists the protocols that are supported by each connector. MiniProg3 ISSP JTAG N/A SWD Supported SWD and SWV ...

Page 70

... For more information on the PSoC 3/ PSoC 5 JTAG, SWD, SWV, and I PSoC 3/ PSoC 5 Technical Reference Manual. For more information on PSoC 1 interfaces, refer to the PSoC 1 Technical Reference Manual enabled devices on the target board. For CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev standard by Philips multimaster host 2 C interfaces, refer to the ...

Page 71

... The recommended mating connectors are the Samtec FTSH-105-01-L-DV-K (surface mount) and the FTSH-105-01-L-D-K (through hole) or similar available from other vendors. The signal assignment is shown in this figure. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** Mating Connector ...

Page 72

... TMS VTARG VTARG 72 Note: The ribbon cable Note: The ribbon cable connector extends connector extends beyond the body of the beyond the body of the connector. Be sure to connector. Be sure to allow room. allow room. Pin 1 Pin 1 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

Page 73

... The power supply voltage can be selected from one of 1.8V, 2.5V, 3.3V, or 5V. The 5V supply may be as low as 4.25V or as high as 5.5V supplied directly from the USB port. CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** 5-Pin 10-Pin ...

Page 74

... MiniProg3 Technical Description 74 CY8CKIT-020 PSoC Development Kit Guide, Doc. # 001-56971 Rev. ** ...

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