74HCT4353D,112 NXP Semiconductors, 74HCT4353D,112 Datasheet - Page 2

• Manufacturer Part Number: 74HCT4353D,112
• Description: IC MUX/DEMUX TRIPLE 1X2 20SOIC
• Manufacturer: NXP Semiconductors
• Series: 74HCTr

Specifications of 74HCT4353D,112

• Function: Multiplexer/Demultiplexer
• Circuit: 3 x 1:2
• On-state Resistance: 60 Ohm
• Voltage Supply Source: Dual Supply
• Voltage - Supply, Single/dual (±): ±4.5 V ~ 5.5 V
• Current - Supply: 16µA
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74HCT4353D; 74HCT4353D; 933790940112

Philips Semiconductors
FEATURES
GENERAL DESCRIPTION
The 74HC/HCT4353 are high-speed Si-gate CMOS
devices. They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT4353 are triple 2-channel analog
multiplexers/demultiplexers with two common enable
inputs (E
QUICK REFERENCE DATA
V
Notes
1. C
December 1990
t
t
C
C
C
EE
PZH
PHZ
SYMBOL
Wide analog input voltage range:
Low “ON” resistance:
80
70
60
Logic level translation:
to enable 5 V logic to communicate with
signals
Typical “break before make” built in
Address latches provided
Output capability: non-standard
I
Triple 2-channel analog
multiplexer/demultiplexer with latch
I
PD
S
CC
dissipation (P
f
C
f
C
= GND = 0 V; T
i
o
/ t
/ t
PD
L
S
category: MSI
= input frequency in MHz
= output frequency in MHz
PZL
PLZ
= output load capacitance in pF
P
C
= max. switch capacitance in pF
(typ.) at V
(typ.) at V
(typ.) at V
is used to determine the dynamic power
1
D
PD
and E
=
V
turn “ON” time E
turn “OFF” time E
input capacitance
power dissipation capacitance per switch
max. switch capacitance
CC
2
independent (Y)
common (Z)
) and a latch enable input (LE). Each
CC
CC
CC
D
2
in W):
amb
f
i
V
V
V
+
= 25 C; t
EE
EE
EE
= 4.5 V
= 6.0 V
= 9.0 V
{(C
PARAMETER
L
1
+ C
, E
1
r
, E
= t
2
S
2
)
or S
f
5 V
or S
= 6 ns
V
n
CC
n
to V
to V
2
5 V analog
os
f
os
o
} where:
2
C
V
notes 1 and 2
multiplexer has two independent inputs/outputs (nY
nY
S
Each multiplexer/demultiplexer contains two bidirectional
analog switches, each with one side connected to an
independent input/output (nY
connected to a common input/output (nZ).
With E
selected (low impedance ON-state) by S
The data at the select inputs may be latched by using the
active LOW latch enable input (LE). When LE is HIGH, the
latch is transparent. When either of the two enable inputs,
E
analog switches are turned off.
V
control inputs (S
ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT.
The analog inputs/outputs (nY
swing between V
negative limit. V
For operation as a digital multiplexer/demultiplexer, V
connected to GND (typically ground).
2. For HC the condition is V
ORDERING INFORMATION
See
Information”
CC
L
3
1
CC
).
1
= 50 pF; R
(active LOW) and E
), a common input/output (nZ) and select inputs (S
V
For HCT the condition is V
= 5 V
CONDITIONS
and GND are the supply voltage pins for the digital
“74HC/HCT/HCU/HCMOS Logic Package
CC
{(C
1
LOW and E
= supply voltage in V
L
.
C
L
S
)
= 1 k ;
CC
1
CC
to S
V
CC
2
as a positive limit and V
V
HIGH, one of the two switches is
3
2
EE
2
, LE, E
(active HIGH), is inactive, all
29
20
3.5
23
5
8
may not exceed 10.0 V.
f
o
} = sum of outputs
HC
0
I
1
and nY
0
= GND to V
I
TYPICAL
74HC/HCT4353
and E
= GND to V
and nY
Product specification
21
22
3.5
23
5
8
2
1
). The V
) and the other side
HCT
1
, and nZ) can
1
CC
to S
CC
EE
3
CC
as a
.
ns
ns
pF
pF
pF
pF
1.5 V
to GND
UNIT
0
EE
and
1
to
is