DP83848IVV National Semiconductor, DP83848IVV Datasheet - Page 54

• Manufacturer Part Number: DP83848IVV
• Manufacturer: National Semiconductor

Specifications of DP83848IVV

• Lead Free Status / Rohs Status: Compliant

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7.2.4 False Carrier Sense Counter Register (FCSCR)
This counter provides information required to implement the “False Carriers” attribute within the MAU managed object
class of Clause 30 of the IEEE 802.3u specification.
7.2.5 Receiver Error Counter Register (RECR)
This counter provides information required to implement the “Symbol Error During Carrier” attribute within the PHY man-
aged object class of Clause 30 of the IEEE 802.3u specification.
15:8
15:8
Bit
7:0
Bit
7:0
RXERCNT[7:0]
FCSCNT[7:0]
RESERVED
RESERVED
Bit Name
Bit Name
Table 24. False Carrier Sense Counter Register (FCSCR), address 0x14
Table 25. Receiver Error Counter Register (RECR), address 0x15
0, RO / COR
0, RO / COR
Default
Default
0, RO
0, RO
RESERVED: Writes ignored, Read as 0
False Carrier Event Counter:
This 8-bit counter increments on every false carrier event. This
counter sticks when it reaches its max count (FFh).
RESERVED: Writes ignored, Read as 0
RX_ER Counter:
When a valid carrier is present and there is at least one occurrence
of an invalid data symbol, this 8-bit counter increments for each re-
ceive error detected. This event can increment only once per valid
carrier event. If a collision is present, the attribute will not incre-
ment. The counter sticks when it reaches its max count.
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Description
Description