DP83848IVV National Semiconductor, DP83848IVV Datasheet - Page 70

• Manufacturer Part Number: DP83848IVV
• Manufacturer: National Semiconductor

Specifications of DP83848IVV

• Lead Free Status / Rohs Status: Compliant

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8.2.9 100BASE-TX Receive Packet Latency Timing
Note: Carrier Sense On Delay is determined by measuring the time from the first bit of the “J” code group to the assertion
of Carrier Sense.
Note: 1 bit time = 10 ns in 100 Mb/s mode
Note: PMD Input Pair voltage amplitude is greater than the Signal Detect Turn-On Threshold Value.
8.2.10 100BASE-TX Receive Packet Deassertion Timing
Note: Carrier Sense Off Delay is determined by measuring the time from the first bit of the “T” code group to the deasser-
tion of Carrier Sense.
Note: 1 bit time = 10 ns in 100 Mb/s mode
T2.9.1
T2.9.2
T2.10.1
Parameter
Parameter
PMD Input Pair
PMD Input Pair
Carrier Sense ON Delay
Receive Data Latency
Carrier Sense OFF Delay
RXD[3:0]
RX_ER
RX_DV
CRS
CRS
Description
Description
T2.9.1
DATA
IDLE
(T/R)
100 Mb/s Normal mode
100 Mb/s Normal mode
100 Mb/s Normal mode
(J/K)
T2.9.2
T2.10.1
70
Notes
Notes
IDLE
Data
Min
Min
Typ
Typ
20
24
24
Max
Max
Units
Units
bits
bits
bits