74HCT85D/S71,118 NXP Semiconductors, 74HCT85D/S71,118 Datasheet - Page 2

• Manufacturer Part Number: 74HCT85D/S71,118
• Manufacturer: NXP Semiconductors
• Type: Magnitude Comparatorr

Specifications of 74HCT85D/S71,118

• Logic Family: HCT
• Technology: CMOS
• Number Of Bits: 4
• High Level Output Current: -4mA
• Low Level Output Current: 4mA
• Output Function: A<B, A=B, A>B
• Package Type: SO
• Quiescent Current: 8uA
• Mounting: Surface Mount
• Pin Count: 16
• Polarity: Non-Inverting
• Abs. Propagation Delay Time: 66ns
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Operating Temperature (max): 125C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Automotive
• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
FEATURES
GENERAL DESCRIPTION
The 74HC/HCT85 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT85 are 4-bit magnitude comparators that
can be expanded to almost any length. They perform
comparison of two 4-bit binary, BCD or other monotonic
codes and present the three possible magnitude results at
the outputs (Q
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. For HC the condition is V
ORDERING INFORMATION
See
December 1990
t
C
C
PHL/
SYMBOL
Serial or parallel expansion without extra gating
Magnitude comparison of any binary words
Output capability: standard
I
4-bit magnitude comparator
I
PD
CC
f
f
C
V
For HCT the condition is V
i
o
“74HC/HCT/HCU/HCMOS Logic Package Information”
CC
PD
= input frequency in MHz
L
t
category: MSI
= output frequency in MHz
(C
PLH
= output load capacitance in pF
P
= supply voltage in V
is used to determine the dynamic power dissipation (P
L
D
= C
V
amb
CC
A B
PD
propagation delay
A
A
I
I
input capacitance
power dissipation capacitance per package
A B,
A=B
n
n
2
, B
, B
, Q
= 25 C; t
, I
to Q
V
f
n
n
o
A=B
A=B
CC
) = sum of outputs
to Q
to Q
2
A=B
, I
and Q
A B
A=B
A B
f
r
i
= t
, Q
to Q
I
I
A B
f
PARAMETER
= GND to V
= GND to V
A B
= 6 ns
(C
). The 4-bit inputs are
A B
L
, Q
V
CC
A B
2
CC
CC
f
o
) where:
1.5 V
2
.
weighted (A
most significant bits.
The operation of the “85” is described in the function table,
showing all possible logic conditions. The upper part of the
table describes the normal operation under all conditions
that will occur in a single device or in a series expansion
scheme. In the upper part of the table the three outputs are
mutually exclusive. In the lower part of the table, the
outputs reflect the feed forward conditions that exist in the
parallel expansion scheme.
For proper compare operation the expander inputs (I
I
connected as follows: I
I
For words greater than 4-bits, units can be cascaded by
connecting outputs Q
corresponding inputs of the significant comparator.
A=B
A=B
D
C
notes 1 and 2
in W):
L
and I
= HIGH.
= 15 pF; V
CONDITIONS
A B
0
) to the least significant position must be
to A
CC
3
and B
= 5 V
A B
A B
, Q
0
to B
= I
A
A B
3
), where A
20
18
15
11
3.5
18
and Q
= = LOW and
HC
TYPICAL
Product specification
74HC/HCT85
A=B
22
20
15
15
3.5
20
HCT
3
to the
and B
ns
ns
ns
ns
pF
pF
3
UNIT
are the
A B
,