P80C32 Intel, P80C32 Datasheet - Page 19

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P80C32

Manufacturer Part Number
P80C32
Description
Manufacturer
Intel
Datasheet

Specifications of P80C32

Cpu Family
80C51
Device Core
8051
Device Core Size
8b
Frequency (max)
12MHz
Program Memory Type
ROMLess
Program Memory Size
Not Required
Total Internal Ram Size
256Byte
# I/os (max)
32
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
6V
Operating Supply Voltage (min)
4V
Instruction Set Architecture
CISC
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
40
Package Type
PDIP
Lead Free Status / Rohs Status
Not Compliant

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PROGRAMMING THE EPROM
The part must be running with a 4 MHz to 6 MHz
oscillator The address of an EPROM location to be
programmed is applied to address lines while the
code byte to be programmed in that location is ap-
plied to data lines Control and program signals must
be held at the levels indicated in Table 4 Normally
EA V
PROG is to be pulsed The EA V
ALE PROG is pulsed low and then EA V
turned to a high (also refer to timing diagrams)
Program Code Data
Verify Code Data
Program Encryption
Array Address 0 –3FH
Program Lock
Bits
Read Signature Byte
Exceeding the V
time could damage the device permanently The
V
glitches
PP
PP
source must be well regulated and free of
is held at logic high until just before ALE
Mode
PP
Bit 1
Bit 2
Bit 3
NOTES
maximum for any amount of
RST
H
H
H
H
H
H
H
PP
Table 4 EPROM Programming Modes
is raised to V
PSEN
L
L
L
L
L
L
L
PP
is re-
PROG
ALE
PP
H
H
DEFINITION OF TERMS
ADDRESS LINES P1 0 – P1 7 P2 0 – P2 5 respec-
tively for A0 – A13
DATA LINES P0 0 – P0 7 for D0 – D7
CONTROL SIGNALS RST PSEN P2 6 P2 7 P3 3
P3 6 P3 7
PROGRAM SIGNALS ALE PROG EA V
12 75V
12 75V
12 75V
12 75V
12 75V
EA
V
H
H
PP
P2 6
H
H
H
L
L
L
L
P2 7
H
H
H
H
L
L
L
P3 3
H
H
H
H
H
L
L
8XC52 54 58
P3 6
H
H
H
H
L
L
L
PP
P3 7
H
H
H
H
L
L
L
19

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