LH28F160BVHE-BTL90 Sharp Electronics, LH28F160BVHE-BTL90 Datasheet - Page 8

• Manufacturer Part Number: LH28F160BVHE-BTL90
• Manufacturer: Sharp Electronics

Specifications of LH28F160BVHE-BTL90

• Cell Type: NOR
• Density: 16Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 21/20Bit
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 2M/1M
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

SHARF=
‘Qo-DQrs
RY/BY#
BYTE#
Symbol
Ao-h9
GND
WE#
WP#
VCC
CE#
RF%
OE#
vPP
NC
A-1
OUTPUT
OUTPUT
SUPPLY
SUPPLY
SUPPLY
INPUT/
DRAIN
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
OPEN
TYPe
ADDRESS INPUTS: Addresses are internally latched during a write cycle.
A-1
A,-A,,
DATA INPUT/OUTPUTS:
deselected or outputs are disabled. Data is internally latched during a write cycle.
DQg-DQr+Inputs
read cycles in x16 mode; not used for status register and identifier code read mode. Data pins float
to high-impedance when the chip is deselected, outputs are disabled, or in x8 mode(Byte#=V&.
Data is internally latched during a write cycle.
CE#-high deselects the device and reduces power consumption to standby levels.
RESET/DEEP POWER-DOWN:
which provides data protection during power transitions. Exit from deep power-down
device to read array mode. With RP#=V,,
blocks without WP# state. Block erase or word/byte write with VIH<RP#<VHH produce spurious
results and should not be attempted.
OUTPUT ENABLE: Gates the device’s outputs during a read cycle.
WRITE ENABLE: Controls writes to the CUI and array blocks. Addresses and data are latched on
the rising edge of the WE# pulse.
WRITE PROTECT: Master control for boot blocks locking. When V,, locked boot blocks cannot
be erased and programmed.
BYTE ENABLE: BYTE# V, places device in x8 mode. All data is then input or output on DQ,-,,
and DQswls float. BYTE# VIHplaces the device in x16 mode , and turns off the A-, input buffer.
READY/BUSY++: Indicates the status of the internal WSM. When low, the WSM is performing an
internal operation (block erase or word/byte write). RY/BY#-high
ready for new commands, block erase is suspended, and word/byte write is inactive, word/byte
write is suspended, or the device is in deep power-down
BLOCK ERASE AND WORD/BYTE
writing words/bytes. With V,,IV,,,,,
word/byte write with an invalid V,, (see DC Characteristics) produce spurious results and should
not be attempted.
DEVICE POWER SUPPLY: Do not float any power pins. With VcclV,,O,
the flash memory are inhibited. Device operations at invalid V,, voltage (see DC Characteristics)
produce spurious results and should not be attempted.
GROUND: Do not float any ground pins.
NO CONNECT: Lead is not internal connected; it may be driven or floated.
All=%4
Ats-A,,
DQ,-DQ,:Inputs
status register and identifier code read cycles. Data pins float to high-impedance when the chip is
CHIP ENABLE: Activates the device’s control logic, input buffers, decoders and sense amplifiers.
automation. RP#-high enables normal operation. When driven low, RP# inhibits write operations
: : Row Address. Selects 1 of 2048 word lines.
: Byte Select Address. Not used in x16 mode.
: Column Address. Selects 1 of 16 bit lines.
: Main Block Address. (Boot and Parameter block Addresses are
data and commands during CUI write cycles; outputs data during memory array,
data during CUI write cycles in x16 mode; outputs data during memory array
Table 2. Pin Descriptions
LHJ36Vll
Puts the device in deep power-down
WRITE POWER SUPPLY: For erasing array blocks or
Name and Function
memory contents cannot be altered. Block erase and
block erase or word/byte write can operate to all
mode.
Z indicates mat the WSM is
mode and resets internal
A12-A19.)
all write attempts to
sets the
Rev. 1.1
6