LH28F016SCR-L95 Sharp Electronics, LH28F016SCR-L95 Datasheet - Page 24
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LH28F016SCR-L95
Manufacturer Part Number
LH28F016SCR-L95
Description
Manufacturer
Sharp Electronics
Datasheet
1.LH28F016SCR-L95.pdf
(58 pages)
Specifications of LH28F016SCR-L95
Cell Type
NOR
Density
16Mb
Access Time (max)
95ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
21b
Operating Supply Voltage (typ)
5V
Operating Temp Range
0C to 70C
Package Type
TSOP
Program/erase Volt (typ)
3.3/5/12V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Word Size
8b
Number Of Words
2M
Supply Current
50mA
Mounting
Surface Mount
Pin Count
40
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LH28F016SCR-L95
Manufacturer:
SHARP
Quantity:
168
FULL STATUS CHECK PROCEDURE
Set Lock-Bit Successful
Block/Device Address
Block/Device Address
Read Status Register
Data(See Above)
Check if Desired
Write 01H/F1H,
Status Register
Set Lock-Bit
Write 60H,
Full Status
Complete
SR.4,5=
SR.7=
SR.3=
SR.1=
SR.4=
Start
Read
1
0
0
0
0
0
1
1
1
1
Command Sequence
Device Protect Error
Set Lock-Bit Error
V
PP
Range Error
Figure 9. Set Block and Master Lock-Bit Flowchart
Error
LHF16CZN
Repeat for subsequent lock-bit set operations.
Full status check can be done after each lock-bit set operation
If error is detected, clear the Status Register before attempting
Write FFH after the last lock-bit set operation to place device in
SR.5,SR.4,SR.3 and SR.1 are only cleared by the Clear Status
or after a sequence of lock-bit set operations.
read array mode.
Register command in cases where multiple lock-bits are set before
full status is checked.
retry or other error recovery.
Operation
Operation
Standby
Standby
Standby
Standby
Standby
Read
Write
Write
Bus
Bus
Lock-Bit Confirm
Block or Master
Lock-Bit Setup
Block/Master
Command
Command
Set
Set
Data=60H
Addr=Block Address(Block),
Data=01H(Block),
Addr=Block Address(Block),
Status Register Data
Check SR.7
1=WSM Ready
0=WSM Busy
Both 1=Command
Check SR.3
1=V
Check SR.1
1=Device Protect Detect
Check SR.4,5
Check SR.4
1=Set Lock-Bit Error
Device Address(Master)
Sequence Error
F1H(Master)
Device Address(Master)
RP#=V
RP#=V
(Set Master Lock-BIt Operation)
(Set Block Lock-BIt Operation)
PP
Error Detect
IH
IH
, Master Lock-Bit is Set
Comments
Comments
Rev. 1.2
21