PA28F400BVB60 Intel, PA28F400BVB60 Datasheet - Page 53
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PA28F400BVB60
Manufacturer Part Number
PA28F400BVB60
Description
Manufacturer
Intel
Datasheet
1.PA28F400BVB60.pdf
(57 pages)
Specifications of PA28F400BVB60
Density
4Mb
Access Time (max)
60ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
19/18Bit
Operating Supply Voltage (typ)
3.3/5V
Operating Temp Range
0C to 70C
Package Type
SOP
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
3/4.5V
Operating Supply Voltage (max)
3.6/5.5V
Word Size
8/16Bit
Number Of Words
512K/256K
Supply Current
65mA
Mounting
Surface Mount
Pin Count
44
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PA28F400BVB60
Manufacturer:
INTEL
Quantity:
45
Part Number:
PA28F400BVB60
Manufacturer:
INTEL
Quantity:
20 000
NOTES:
1. Read timing characteristics during program and erase operations are the same as during read-only operations. Refer to AC
2. The on-chip WSM completely automates program/erase operations; program/erase algorithms are now controlled internally
3. Refer to command definition table for valid A
4. Refer to command definition table for valid D
5. Program/erase durations are measured to valid SRD data (successful operation, SR.7 = 1)
6. For boot block program/erase, RP# should be held at V
7. Time t
8. Sampled, but not 100% tested.
9. See Test Configuration (Figure 22), 2.7 V–3.6 V and 3.3
10. See Test Configuration (Figure 22), 5 V Standard Test component values.
Characteristics during read mode.
which includes verify and margining operations.
successfully.
SEE NEW DESIGN RECOMMENDATIONS
PHBR
is required for successful locking of the boot block.
IN
IN
. (Table 7)
. (Table 7)
HH
or WP# should be held at V
0.3 V Standard Test component values.
4-MBIT SmartVoltage BOOT BLOCK FAMILY
IH
until operation completes
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