CY28159PVC Cypress Semiconductor Corp, CY28159PVC Datasheet - Page 8

• Manufacturer Part Number: CY28159PVC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY28159PVC

• Function: Clock Generator
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Package Type: SSOP
• Pin Count: 48
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

Maximum Ratings
Input Voltage Relative to V
Input Voltage Relative to V
Storage Temperature: ................................ –65 C to + 150 C
Operating Temperature: .................................... 0 C to +70 C
Maximum ESD .............................................................2000V
Maximum Power Supply: ................................................5.5V
DC Parameters
Notes:
Document #: 38-07118 Rev. *A
5.
6.
7.
8.
Parameter
VIL1
VIH1
IIL
IIH
IIL
IIH
Ioz
Idd
Isdd
Cin
Cout
Lpin
Cxtal
Txs
Rpi
The voltage on any input or I/O pin canno t exceed th power pin during power-up. Power supply sequencing is NOT required.
Applicable to input signals: Sel100/133, Sel(0:1)), Spread#, PWRDN#, Mult(0:1)
Although internal pull-up or pull-down resistors have a typical value of 250k, this value may vary between 200k and 500k.
All outputs loaded as per Table 3.
Input Low Voltage
Input High Voltage
Input Low Current (@V
Input High Current (@V
nput Low Current (@V
Input High Current (@V
Three-State leakage current
Static Supply Current
Dynamic Supply Current
Input Pin Capacitance
Output Pin Capacitance
Pin Inductance
Crystal Pin Capacitance
Crsytal Startup Time
Internal Pull-up and Pull-down Re-
sistor Value
(V
DD
[5]
Description
= V
[7]
SS
DDQ
:...............................V
DDA
or AV
= 3.3V±5%, T
DD
IN
IN
IN
IN
–V
–V
: ............. V
–V
–V
SS
DD
DD
SS
)
)
)
)
A
= 0°C to +70°C)
Note 6
For internal pull-up resistors
For internal pull-down resistors
PwrDwn = Low
133 MHz CPU
Measured from Pin to Ground.
From stable 3.3V power supply
DD
SS
+ 0.3V
– 0.3V
[8]
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric field. However,
precautions should be take to avoid application of any voltage
higher than the maximum rated voltages to this circuit. For
proper operation, V
range.
V
Unused inputs must always be tied to an appropriate logic volt-
age level (either V
Conditions
SS
< (V
IN
or V
[6]
OUT
[6]
SS
)< V
IN
or V
and V
DD
DD
OUT
).
Min.
–16
200
2.0
34
0
0
4
should be constrained to the
Typ.
250
36
Max.
CY28159
200
500
0.8
–4
16
10
80
38
40
5
5
6
7
Page 8 of 13
Unit
Vdc
Vdc
mA
mA
pF
pF
nH
pH
k
A
A
A
A
A
S
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